欢迎访问ic37.com |
会员登录 免费注册
发布采购

JS28F640J3F75A 参数 Datasheet PDF下载

JS28F640J3F75A图片预览
型号: JS28F640J3F75A
PDF下载: 下载PDF文件 查看货源
内容描述: Numonyx®嵌入式闪存( J3 65 nm)的单细胞每比特( SBC ) [Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)]
分类和应用: 闪存
文件页数/大小: 66 页 / 2203 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号JS28F640J3F75A的Datasheet PDF文件第31页浏览型号JS28F640J3F75A的Datasheet PDF文件第32页浏览型号JS28F640J3F75A的Datasheet PDF文件第33页浏览型号JS28F640J3F75A的Datasheet PDF文件第34页浏览型号JS28F640J3F75A的Datasheet PDF文件第36页浏览型号JS28F640J3F75A的Datasheet PDF文件第37页浏览型号JS28F640J3F75A的Datasheet PDF文件第38页浏览型号JS28F640J3F75A的Datasheet PDF文件第39页  
Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)  
9.1.1  
Clearing the Status Register  
The Status Register (SR) contain Status and error bits which are set by the device. SR  
status bits are cleared by the device, however SR error bits are cleared by issuing the  
Clear SR command (see Table 21). Resetting the device also clears the SR.  
Table 21: Clear Status Register Command Bus-Cycles  
Setup Write Cycle  
Command  
Confirm Write Cycle  
Address Bus Data Bus  
Address Bus  
Data Bus  
0050h  
Clear Status Register  
Device Address  
Issuing the Clear SR command places the device in Read SR mode.  
Note:  
Care should be taken to avoid SR ambiguity. If a command sequence error occurs while  
in an Erase Suspend condition, the SR will indicate a Command Sequence error by  
setting SR.4 and SR.5. When the erase operation is resumed (and finishes), any errors  
that may have occurred during the erase operation will be masked by the Command  
Sequence error. To avoid this situation, clear the Status Register prior to resuming a  
suspended erase operation. The Clear SR command functions independent of the  
voltage level on VPEN.  
9.2  
Read Operations  
Four types of data can be read from the device: array data, device information, CFI  
data, and device status. Upon power-up or return from reset, the device defaults to  
Read Array mode. To change the device’s read mode, the appropriate command must  
be issued to the device. Table 22 shows the command codes used to configure the  
device for the desired read mode. The following sections describe each read mode.  
Table 22: Read Mode Command Bus-Cycles  
Setup Write Cycle  
Address Bus Data Bus  
Confirm Write Cycle  
Address Bus Data Bus  
Command  
Read Array  
Device Address  
Device Address  
Device Address  
Device Address  
00FFh  
0070h  
0090h  
0098h  
Read Status Register  
Read Device Information  
CFI Query  
9.2.1  
Read Array  
Upon power-up or return from reset, the device defaults to Read Array mode. Issuing  
the Read Array command places the device in Read Array mode. Subsequent reads  
output array data on DQ[15:0]. The device remains in Read Array mode until a  
different read command is issued, or a program or erase operation is performed, in  
which case, the read mode is automatically changed to Read Status.  
To change the device to Read Array mode while it is programming or erasing, first issue  
the Suspend command. After the operation has been suspended, issue the Read Array  
command. When the program or erase operation is subsequently resumed, the device  
will automatically revert back to Read Status mode.  
Note:  
Issuing the Read Array command to the device while it is actively programming or  
erasing causes subsequent reads from the device to output invalid data. Valid array  
data is output only after the program or erase operation has finished.  
Jan 2011  
208032-03  
Datasheet  
35  
 复制成功!