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JS28F640J3F75A 参数 Datasheet PDF下载

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型号: JS28F640J3F75A
PDF下载: 下载PDF文件 查看货源
内容描述: Numonyx®嵌入式闪存( J3 65 nm)的单细胞每比特( SBC ) [Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)]
分类和应用: 闪存
文件页数/大小: 66 页 / 2203 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)  
9.0  
Flash Operations  
This section describes the operational features of flash memory. Operations are  
command-based, wherein command codes are first issued to the device, then the  
device performs the desired operation. All command codes are issued to the device  
using bus-write cycles (see Chapter 8.0, “Bus Interface”). A complete list of available  
command codes can be found in Section 11.0, “Device Command Codes” on page 47.  
9.1  
Status Register  
The Status Register (SR) is an 8-bit, read-only register that indicates device status and  
operation errors. To read the Status Register, issue the Read Status Register command.  
Subsequent reads output Status Register information on DQ[7:0], and 00h on  
DQ[15:8].  
SR status bits are set and cleared by the device. SR error bits are set by the device, but  
must be cleared using the Clear Status Register command. Upon power-up or exit from  
reset, the Status Register defaults to 80h. Page-mode reads are not supported in this  
read mode. Status Register contents are latched on the falling edge of OE# or CEX (CEX  
low is defined as the combination of pins CE0, CE1, and CE2 that enable the device.  
CEX high is defined as the combination of pins CE0, CE1, and CE2 that disable the  
device). OE# must toggle to VIH or the device must be disabled before further reads to  
update the Status Register latch. The Read Status Register command functions  
independently of VPEN voltage.  
Table 20 shows Status Register bit definitions.  
Table 20: Status Register Bit Definitions  
Status Register (SR)  
Default Value = 80h  
Program/  
Erase  
Voltage  
Error  
Erase  
Suspend  
Status  
Program  
Suspend  
Status  
Ready  
Status  
Erase  
Error  
Program  
Error  
Block-Locked  
Reserved  
0
Error  
7
6
5
4
3
2
1
Bit  
Name  
Ready Status  
Description  
0 = Device is busy. SR[6:0] are invalid (Not driven);  
1 = Device is ready. SR[6:0] are valid.  
7
6
5
0 = Erase suspend not in effect.  
1 = Erase suspend in effect.  
Erase Suspend Status  
SR.5 SR.4  
Erase Error  
0
0
1
1
0
1
0
1
= Program or erase operation successful.  
= Program error - operation aborted.  
= Erase error - operation aborted.  
Command  
Sequence  
Error  
Program  
Error  
4
= Command sequence error - command aborted.  
0 = Within acceptable limits during program or erase operation.  
3
2
Program/Erase Voltage Error  
Program Suspend Status  
1 = Not within acceptable limits during program or erase operation - Operation  
aborted.  
0 = Program suspend not in effect.  
1 = Program suspend in effect.  
0 = Block NOT locked during program or erase - operation successful.  
1 = Block locked during program or erase - operation aborted.  
1
0
Block-Locked Error  
Reserved  
Reserved  
Datasheet  
34  
Jan 2011  
208032-03  
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