256Mb and 512Mb (256Mb/256Mb), P30-65nm
Common Flash Interface
Table 33: Partition Region 1 Information (Continued)
Hex Offset
P = 10Ah
Description
Address
Bottom/Top
Optional Flash features and commands
Length
Bottom/Top
(P+42)h
(P+43)h
(P+44)h
(P+45)h
(P+46)h
(P+47)h
Partition 1 (erase block type 2) programming region information:
Bits 0-7 = x, 2nx = Programming region aligned size (bytes)
Bits 8-14 = reserved for future use
Bit 15 = legacy flash operation (ignore 0:7)
Bits 16 - 23 = y = Control mode valid size in bytes Bits 24 - 31 =
reserved
6
14C:
14D:
14E:
14F:
150:
151:
Bits 32 - 39 = z = Control mode invalid size in bytes
Bits 40 - 46 = reserved
Bit 47 = legacy flash operation (ignore 23:16 and 39:32)
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
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