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JS28F256P30TFE 参数 Datasheet PDF下载

JS28F256P30TFE图片预览
型号: JS28F256P30TFE
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB和512MB (256 / 256MB ) , P30-65nm [256Mb and 512Mb (256Mb/256Mb), P30-65nm]
分类和应用:
文件页数/大小: 95 页 / 1351 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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256Mb and 512Mb (256Mb/256Mb), P30-65nm  
Device Command Codes  
Table 10: Command Codes and Definitions (Continued)  
Mode  
Code  
Device Mode  
Description  
Erase  
0x20  
Block Erase Setup  
First cycle of a 2-cycle command; prepares the CUI for a block-erase op-  
eration. The device performs the erase algorithm on the block ad-  
dressed by the Erase Confirm command. If the next command is not the  
Erase Confirm (0xD0) command, the CUI sets Status Register bits SR.4  
and SR.5, and places the device in read status register mode.  
0xD0  
0xB0  
Block Erase Confirm If the first command was Block Erase Setup (0x20), the CUI latches the  
address and data, and the device erases the addressed block. During  
block-erase operations, the device responds only to Read Status Regis-  
ter and Erase Suspend commands. CE# or OE# must be toggled to up-  
date the Status Register in asynchronous read. CE# or ADV# must be  
toggled to update the Status Register Data for synchronous Non-array  
reads.  
Suspend  
Program or Erase  
Suspend  
This command issued to any device address initiates a suspend of the  
currently-executing program or block erase operation. The Status Reg-  
ister indicates successful suspend operation by setting either SR.2 (pro-  
gram suspended) or SR.6 (erase suspended), along with SR.7 (ready).  
The Write State Machine remains in the suspend mode regardless of  
control signal states (except for RST# asserted).  
0xD0  
0x60  
Suspend Resume  
Block lock Setup  
This command issued to any device address resumes the suspended  
program or block-erase operation.  
Block Locking/  
Unlocking  
First cycle of a 2-cycle command; prepares the CUI for block lock config-  
uration changes. If the next command is not Block Lock (0x01), Block  
Unlock (0xD0), or Block Lock-Down (0x2F), the CUI sets Status Register  
bits SR.5 and SR.4, indicating a command sequence error.  
0x01  
0xD0  
Block lock  
If the previous command was Block Lock Setup (0x60), the addressed  
block is locked.  
Block Unlock  
If the previous command was Block Lock Setup (0x60), the addressed  
block is unlocked. If the addressed block is in a lock-down state, the  
operation has no effect.  
0x2F  
Block Lock-Down  
If the previous command was Block Lock Setup (0x60), the addressed  
block is locked down.  
PDF: 09005aef84566799  
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
26  
© 2013 Micron Technology, Inc. All rights reserved.  
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