1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF010 / SST39LF020 / SST39LF040
SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
SST39LF/VF040 SST39LF/VF020 SST39LF/VF010
SST39LF/VF010 SST39LF/VF020 SST39LF/VF040
A11
A9
A11
A9
A11
A9
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
OE#
A10
OE#
A10
1
2
A8
A8
A8
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
3
A13
A14
A17
WE#
A13
A14
A17
WE#
A13
A14
NC
4
5
Standard Pinout
Top View
6
WE#
7
V
V
V
8
DD
DD
DD
A18
A16
A15
A12
A7
NC
A16
A15
A12
A7
NC
A16
A15
A12
A7
V
V
V
9
SS
SS
SS
Die Up
DQ2
DQ1
DQ0
A0
10
11
12
13
14
15
16
DQ2
DQ1
DQ0
A0
DQ2
DQ1
DQ0
A0
A6
A6
A6
A1
A1
A1
A5
A5
A5
A2
A2
A2
A4
A4
A4
A3
A3
A3
1150 32-tsop WH P1.1
Figure 3: Pin Assignments for 32-lead TSOP (8mm x 14mm)
Table 1: Pin Description
Symbol Pin Name
Functions
AMS1-A0 Address Inputs
To provide memory addresses. During Sector-Erase AMS-A12 address lines will
select the sector. During Block-Erase AMS-A16 address lines will select the block.
DQ7-DQ0 Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
CE#
OE#
WE#
VDD
Chip Enable
Output Enable
Write Enable
Power Supply
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage:
3.0-3.6V for SST39LF010/020/040
2.7-3.6V for SST39VF010/020/040
VSS
NC
Ground
No Connection
Unconnected pins.
T1.1 25023
1. AMS = Most significant address
MS = A16 for SST39LF/VF010, A17 for SST39LF/VF020, and A18 for SST39LF/VF040
A
©2012 Silicon Storage Technology, Inc.
DS25023B
06/13
5
MICROCHIP [ MICROCHIP ]
