PIC32MX1XX/2XX
11.0
I/O PORTS
Note 1:
This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to
Section 12. “I/O Ports”
(DS61120) in the
“PIC32 Family
Reference Manual”,
(www.microchip.com/PIC32).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
General purpose I/O pins are the simplest of peripher-
als. They allow the PIC
®
MCU to monitor and control
other devices. To add flexibility and functionality, some
pins are multiplexed with alternate function(s). These
functions depend on which peripheral features are on
the device. In general, when a peripheral is functioning,
that pin may not be used as a general purpose I/O pin.
Following are some of the key features of this module:
• Individual output pin open-drain enable/disable
• Individual input pin weak pull-up and pull-down
• Monitor selective inputs and generate interrupt
when change in pin state is detected
• Operation during CPU Sleep and Idle modes
• Fast bit manipulation using CLR, SET and INV
registers
illustrates a block diagram of a typical
multiplexed I/O port.
FIGURE 11-1:
BLOCK DIAGRAM OF A TYPICAL MULTIPLEXED PORT STRUCTURE
Peripheral Module
Peripheral Module Enable
Peripheral Output Enable
Peripheral Output Data
PIO Module
RD ODC
Data Bus
SYSCLK
WR ODC
RD TRIS
D
Q
ODC
CK
Q
EN
1
0
D
Q
1
0
Output Multiplexers
D
Q
I/O Pin
LAT
CK
Q
EN
0
1
TRIS
CK
Q
EN
I/O Cell
WR TRIS
WR LAT
WR PORT
RD LAT
1
RD PORT
0
Sleep
SYSCLK
Synchronization
Peripheral Input
R
Peripheral Input Buffer
Q
Q
D
CK
Q
Q
D
CK
Legend:
Note:
R = Peripheral input buffer types may vary. Refer to
for peripheral details.
This block diagram is a general representation of a shared port/peripheral structure for illustration purposes only. The actual structure
for any specific port/peripheral combination may be different than it is shown here.
©
2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 143