TABLE 4-6:
TIMER REGISTER MAP
All
Resets
File Name Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TMR1
PR1
0100
0102
0104
0106
0108
010A
010C
010E
0110
0112
0114
0116
0118
011A
011C
011E
0120
Timer1 Register
0000
FFFF
0000
0000
0000
0000
FFFF
FFFF
0000
0000
0000
0000
0000
FFFF
FFFF
0000
0000
Timer1 Period Register
T1CON
TMR2
TMR3HLD
TMR3
PR2
TON
—
TSIDL
—
—
—
—
—
—
TGATE TCKPS1 TCKPS0
—
TSYNC
TCS
—
Timer2 Register
Timer3 Holding Register (for 32-bit timer operations only)
Timer3 Register
Timer2 Period Register
PR3
Timer3 Period Register
T2CON
T3CON
TMR4
TMR5HLD
TMR5
PR4
TON
TON
—
—
TSIDL
TSIDL
—
—
—
—
—
—
—
—
—
—
—
—
TGATE TCKPS1 TCKPS0
TGATE TCKPS1 TCKPS0
T32
—
—
—
TCS
TCS
—
—
Timer4 Register
Timer5 Holding Register (for 32-bit operations only)
Timer5 Register
Timer4 Period Register
PR5
Timer5 Period Register
T4CON
T5CON
Legend:
TON
TON
—
—
TSIDL
TSIDL
—
—
—
—
—
—
—
—
—
—
—
—
TGATE TCKPS1 TCKPS0
TGATE TCKPS1 TCKPS0
T32
—
—
—
TCS
TCS
—
—
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
MICROCHIP [ MICROCHIP ]
