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PIC24FJ32GA104T-I/PT 参数 Datasheet PDF下载

PIC24FJ32GA104T-I/PT图片预览
型号: PIC24FJ32GA104T-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 44分之28引脚, 16位通用闪存微控制器采用nanoWatt XLP技术 [28/44-Pin, 16-Bit General Purpose Flash Microcontrollers with nanoWatt XLP Technology]
分类和应用: 闪存微控制器
文件页数/大小: 308 页 / 2416 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC24FJ64GA104 FAMILY  
A separate bit, WPCFG, is used to independently protect  
the last page of program space, including the Flash Con-  
25.5.2  
CODE SEGMENT PROTECTION  
In addition to global General Segment protection, a  
separate subrange of the program memory space can  
be individually protected against writes and erases.  
This area can be used for many purposes where a  
separate block of erase and write-protected code is  
needed, such as bootloader applications. Unlike  
common boot block implementations, the specially  
protected segment in the PIC24FJ64GA104 family  
devices can be located by the user anywhere in the  
program space and configured in a wide range of sizes.  
figuration Words. Programming WPCFG (= 0) protects  
the last page, regardless of the other bit settings. This  
may be useful in circumstances where write protection is  
needed for both a code segment in the bottom of  
memory, as well as the Flash Configuration Words.  
The various options for segment code protection are  
shown in Table 25-2.  
25.5.3  
CONFIGURATION REGISTER  
PROTECTION  
Code segment protection provides an added level of  
protection to a designated area of program memory, by  
disabling the NVM safety interlock, whenever a write or  
erase address falls within a specified range. It does not  
override General Segment protection controlled by the  
GCP or GWRP bits. For example, if GCP and GWRP  
are enabled, enabling segmented code protection for  
the bottom half of program memory does not undo  
General Segment protection for the top half.  
The Configuration registers are protected against  
inadvertent or unwanted changes, or reads in two  
ways. The primary protection method is the same as  
that of the RP registers – shadow registers contain a  
complimentary value which is constantly compared  
with the actual value.  
To safeguard against unpredictable events, Configura-  
tion bit changes resulting from individual cell level  
disruptions (such as ESD events) will cause a parity  
error and trigger a device Reset.  
The size and type of protection for the segmented code  
range are configured by the WPFPx, WPEND, WPCFG  
and WPDIS bits in Configuration Word 3. Code seg-  
ment protection is enabled by programming the WPDIS  
bit (= 0). The WPFP bits specify the size of the segment  
to be protected by specifying the 512-word code page  
that is the start or end of the protected segment. The  
specified region is inclusive, therefore, this page will  
also be protected.  
The data for the Configuration registers is derived from  
the Flash Configuration Words in program memory.  
When the GCP bit is set, the source data for device  
configuration is also protected as a consequence. Even  
if General Segment protection is not enabled, the  
device configuration can be protected by using the  
appropriate code cement protection setting.  
The WPEND bit determines if the protected segment  
uses the top or bottom of the program space as a  
boundary. Programming WPEND (= 0) sets the bottom  
of program memory (000000h) as the lower boundary  
of the protected segment. Leaving WPEND unpro-  
grammed (= 1) protects the specified page through the  
last page of implemented program memory, including  
the Configuration Word locations.  
TABLE 25-2: SEGMENT CODE PROTECTION CONFIGURATION OPTIONS  
Segment Configuration Bits  
Write/Erase Protection of Code Segment  
WPDIS  
WPEND  
WPCFG  
1
x
1
No additional protection enabled; all program memory protection is configured  
by GCP and GWRP  
1
0
x
1
0
0
Last code page protected, including Flash Configuration Words  
Addresses from the first address of code page are defined by WPFP<5:0>  
through the end of implemented program memory (inclusive) are protected,  
including Flash Configuration Words  
0
0
0
1
0
1
Address, 000000h, through the last address of code page, defined by  
WPFP<5:0> (inclusive) is protected  
Addresses from first address of code page, defined by WPFP<5:0> through the  
end of implemented program memory (inclusive), are protected, including Flash  
Configuration Words  
0
0
1
Addresses from first address of code page, defined by WPFP<5:0> through the  
end of implemented program memory (inclusive), are protected  
2010 Microchip Technology Inc.  
DS39951C-page 249  
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