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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
TABLE 1-2:  
PIC18F2420/2520 PINOUT I/O DESCRIPTIONS (CONTINUED)  
Pin Number  
Pin Buffer  
Type Type  
Pin Name  
Description  
PORTC is a bidirectional I/O port.  
SPDIP,  
QFN  
SOIC  
RC0/T1OSO/T13CKI  
RC0  
11  
12  
8
9
I/O  
O
I
ST  
ST  
Digital I/O.  
Timer1 oscillator output.  
Timer1/Timer3 external clock input.  
T1OSO  
T13CKI  
RC1/T1OSI/CCP2  
RC1  
I/O  
I
I/O  
ST  
Analog  
ST  
Digital I/O.  
Timer1 oscillator input.  
Capture 2 input/Compare 2 output/PWM2 output.  
T1OSI  
CCP2(2)  
RC2/CCP1  
RC2  
13  
14  
10  
11  
I/O  
I/O  
ST  
ST  
Digital I/O.  
CCP1  
Capture 1 input/Compare 1 output/PWM1 output.  
RC3/SCK/SCL  
RC3  
I/O  
I/O  
I/O  
ST  
ST  
ST  
Digital I/O.  
SCK  
SCL  
Synchronous serial clock input/output for SPI mode.  
Synchronous serial clock input/output for I2C™ mode.  
RC4/SDI/SDA  
RC4  
15  
12  
I/O  
I
I/O  
ST  
ST  
ST  
Digital I/O.  
SPI data in.  
I2C data I/O.  
SDI  
SDA  
RC5/SDO  
RC5  
16  
17  
13  
14  
I/O  
O
ST  
Digital I/O.  
SPI data out.  
SDO  
RC6/TX/CK  
RC6  
I/O  
O
I/O  
ST  
ST  
Digital I/O.  
TX  
CK  
EUSART asynchronous transmit.  
EUSART synchronous clock (see related RX/DT).  
RC7/RX/DT  
RC7  
18  
15  
I/O  
I
I/O  
ST  
ST  
ST  
Digital I/O.  
RX  
DT  
EUSART asynchronous receive.  
EUSART synchronous data (see related TX/CK).  
RE3  
VSS  
VDD  
P
See MCLR/VPP/RE3 pin.  
8, 19 5, 16  
20 17  
Ground reference for logic and I/O pins.  
Positive supply for logic and I/O pins.  
CMOS = CMOS compatible input or output  
P
Legend: TTL = TTL compatible input  
ST = Schmitt Trigger input with CMOS levels  
= Output  
I
= Input  
O
P
= Power  
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.  
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.  
© 2008 Microchip Technology Inc.  
DS39631E-page 15  
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