PIC18F2420/2520/4420/4520
TABLE 1-2:
PIC18F2420/2520 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Buffer
Pin Name
Description
SPDIP,
SOIC
Type Type
QFN
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/INT0/FLT0/AN12
21
18
RB0
I/O
TTL
ST
ST
Digital I/O.
INT0
FLT0
AN12
I
I
I
External interrupt 0.
PWM Fault input for CCP1.
Analog input 12.
Analog
RB1/INT1/AN10
RB1
22
23
24
25
26
27
28
19
20
21
22
23
24
25
I/O
I
I
TTL
ST
Analog
Digital I/O.
External interrupt 1.
Analog input 10.
INT1
AN10
RB2/INT2/AN8
RB2
I/O
I
I
TTL
ST
Analog
Digital I/O.
External interrupt 2.
Analog input 8.
INT2
AN8
RB3/AN9/CCP2
RB3
I/O
I
I/O
TTL
Analog
ST
Digital I/O.
Analog input 9.
Capture 2 input/Compare 2 output/PWM2 output.
AN9
CCP2(1)
RB4/KBI0/AN11
RB4
I/O
I
I
TTL
TTL
Analog
Digital I/O.
Interrupt-on-change pin.
Analog input 11.
KBI0
AN11
RB5/KBI1/PGM
RB5
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
Low-Voltage ICSP™ Programming enable pin.
KBI1
PGM
RB6/KBI2/PGC
RB6
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming clock pin.
KBI2
PGC
RB7/KBI3/PGD
RB7
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
KBI3
PGD
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
DS39631E-page 14
© 2008 Microchip Technology Inc.
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