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PIC18F4580-I/PT 参数 Datasheet PDF下载

PIC18F4580-I/PT图片预览
型号: PIC18F4580-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与ECAN技术, 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 490 页 / 8912 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2480/2580/4480/4580  
The transmit buffer with the highest priority will be sent  
first. If two buffers have the same priority setting, the  
buffer with the highest buffer number will be sent first.  
There are four levels of transmit priority. If the TXP bits  
for a particular message buffer are set to ‘11’, that buf-  
fer has the highest possible priority. If the TXP bits for  
a particular message buffer are set to ‘00’, that buffer  
has the lowest possible priority.  
24.6.3  
TRANSMIT PRIORITY  
prioritization within the  
Transmit priority is  
a
PIC18F2480/2580/4480/4580 devices of the pending  
transmittable messages. This is independent from and  
not related to any prioritization implicit in the message  
arbitration scheme built into the CAN protocol. Prior to  
sending the Start-Of-Frame (SOF), the priority of all  
buffers that are queued for transmission is compared.  
FIGURE 24-2:  
TRANSMIT BUFFERS  
TXB0  
TXB1  
TXB2  
TXB3 - TXB8  
Message  
Queue  
Control  
Transmit Byte Sequencer  
DS39637D-page 334  
© 2009 Microchip Technology Inc.  
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