PIC18F2480/2580/4480/4580
TABLE 17-3: REGISTERS ASSOCIATED WITH ECCP1 MODULE AND TIMER1 TO TIMER3
Reset
Values
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
on Page:
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RI
RBIE
TO
TMR0IF
PD
INT0IF
POR
RBIF
BOR
55
56
58
58
58
57
58
58
58
58
58
56
56
56
56
56
56
57
57
57
57
57
57
57
57
RCON
IPR1
IPEN
PSPIP
SBOREN
ADIP
—
RCIP
RCIF
RCIE
—
TXIP
TXIF
TXIE
EEIP
EEIF
EEIE
SSPIP
SSPIF
SSPIE
BCLIP
BCLIF
BCLIE
CCP1IP
CCP1IF
CCP1IE
HLVDIP
HLVDIF
HLVDIE
TMR2IP
TMR2IF
TMR2IE
TMR1IP
TMR1IF
TMR1IE
PIR1
PSPIF
ADIF
PIE1
PSPIE
ADIE
(3)
(3)
(3)
(3)
IPR2
OSCFIP
OSCFIF
OSCFIE
CMIP
TMR3IP ECCP1IP
TMR3IF ECCP1IF
TMR3IE ECCP1IE
(3)
PIR2
CMIF
—
(3)
PIE2
CMIE
—
TRISB
TRISC
TRISD
PORTB Data Direction Register
PORTC Data Direction Register
PORTD Data Direction Register
(1)
TMR1L
TMR1H
T1CON
TMR2
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
RD16
Timer2 Module Register
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
T1RUN
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
T2CON
PR2
—
Timer2 Period Register
TMR3L
TMR3H
T3CON
ECCPR1L
Holding Register for the Least Significant Byte of the 16-bit TMR3 Register
Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
(1)
(1)
RD16
T3ECCP1
T3CKPS1 T3CKPS0 T3CCP1
T3SYNC TMR3CS TMR3ON
(2)
(2)
Enhanced Capture/Compare/PWM Register 1 (LSB)
Enhanced Capture/Compare/PWM Register 1 (MSB)
ECCPR1H
(2)
ECCP1CON EPWM1M1 EPWM1M0 EDC1B1
EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0
(2)
(2)
(2)
ECCP1AS
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1
PSSAC0 PSSBD1
PSSBD0
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
ECCP1DEL
PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during ECCP operation.
Note 1: These bits are available on PIC18F4X80 devices only.
2: These bits or registers are unimplemented in PIC18F2X80 devices; always maintain these bit clear.
3: These bits are available on PIC18F4X80 and reserved on PIC18F2X80 devices.
DS39637D-page 190
© 2009 Microchip Technology Inc.