PIC18F45J10 FAMILY
Multi-Master Communication, Bus Collision
IORLW ..................................................................... 272
IORWF ..................................................................... 272
LFSR ....................................................................... 273
MOVF ...................................................................... 273
MOVFF .................................................................... 274
MOVLB .................................................................... 274
MOVLW ................................................................... 275
MOVWF ................................................................... 275
MULLW .................................................................... 276
MULWF .................................................................... 276
NEGF ....................................................................... 277
NOP ......................................................................... 277
Opcode Field Descriptions ....................................... 250
POP ......................................................................... 278
PUSH ....................................................................... 278
RCALL ..................................................................... 279
RESET ..................................................................... 279
RETFIE .................................................................... 280
RETLW .................................................................... 280
RETURN .................................................................. 281
RLCF ....................................................................... 281
RLNCF ..................................................................... 282
RRCF ....................................................................... 282
RRNCF .................................................................... 283
SETF ....................................................................... 283
SETF (Indexed Literal Offset Mode) ........................ 297
SLEEP ..................................................................... 284
Standard Instructions ............................................... 249
SUBFWB ................................................................. 284
SUBLW .................................................................... 285
SUBWF .................................................................... 285
SUBWFB ................................................................. 286
SWAPF .................................................................... 286
TBLRD ..................................................................... 287
TBLWT .................................................................... 288
TSTFSZ ................................................................... 289
XORLW ................................................................... 289
XORWF ................................................................... 290
INTCON Registers ............................................................. 85
and Arbitration ..................................................186
Multi-Master Mode ...................................................186
Operation .................................................................164
Read/Write Bit Information (R/W Bit) ............... 164, 166
Registers ..................................................................159
Serial Clock (SCKx/SCLx) .......................................166
Slave Mode ..............................................................164
Addressing .......................................................164
Reception .........................................................166
Transmission ....................................................166
Sleep Operation .......................................................186
Stop Condition Timing ..............................................185
INCF .................................................................................270
INCFSZ ............................................................................271
In-Circuit Debugger ..........................................................247
In-Circuit Serial Programming (ICSP) ......................235, 247
Indexed Literal Offset Addressing
and Standard PIC18 Instructions .............................296
Indexed Literal Offset Mode .............................................296
Indirect Addressing ............................................................67
INFSNZ ............................................................................271
Initialization Conditions for All Registers ......................47–50
Instruction Cycle .................................................................56
Clocking Scheme .......................................................56
Instruction Flow/Pipelining .................................................56
Instruction Set ..................................................................249
ADDLW ....................................................................255
ADDWF ....................................................................255
ADDWF (Indexed Literal Offset Mode) ....................297
ADDWFC .................................................................256
ANDLW ....................................................................256
ANDWF ....................................................................257
BC ............................................................................257
BCF ..........................................................................258
BN ............................................................................258
BNC .........................................................................259
BNN .........................................................................259
BNOV .......................................................................260
BNZ ..........................................................................260
BOV .........................................................................263
BRA ..........................................................................261
BSF ..........................................................................261
BSF (Indexed Literal Offset Mode) ..........................297
BTFSC .....................................................................262
BTFSS .....................................................................262
BTG ..........................................................................263
BZ ............................................................................264
CALL ........................................................................264
CLRF ........................................................................265
CLRWDT ..................................................................265
COMF ......................................................................266
CPFSEQ ..................................................................266
CPFSGT ..................................................................267
CPFSLT ...................................................................267
DAW .........................................................................268
DCFSNZ ..................................................................269
DECF .......................................................................268
DECFSZ ...................................................................269
Extended Instruction Set ..........................................291
General Format ........................................................251
GOTO ......................................................................270
INCF .........................................................................270
INCFSZ ....................................................................271
INFSNZ ....................................................................271
2
Inter-Integrated Circuit. See I C Mode.
Internal Oscillator Block ..................................................... 30
Internal RC Oscillator
Use with WDT .......................................................... 242
Internet Address .............................................................. 363
Interrupt Sources ............................................................. 235
A/D Conversion Complete ....................................... 219
Capture Complete (CCP) ......................................... 129
Compare Complete (CCP) ....................................... 130
Interrupt-on-Change (RB7:RB4) .............................. 101
INTx Pin ..................................................................... 95
PORTB, Interrupt-on-Change .................................... 95
TMR0 ......................................................................... 95
TMR0 Overflow ........................................................ 117
TMR1 Overflow ........................................................ 119
TMR2-to-PR2 Match (PWM) ............................ 132, 137
Interrupts ............................................................................ 83
Interrupts, Flag Bits
Interrupt-on-Change (RB7:RB4)
Flag (RBIF Bit) ................................................. 101
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 272
IORWF ............................................................................. 272
IPR Registers ..................................................................... 92
DS39682E-page 356
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MICROCHIP [ MICROCHIP ]
