PIC18F45J10 FAMILY
Block Diagrams
INDEX
A/D ........................................................................... 218
Analog Input Model .................................................. 219
Baud Rate Generator .............................................. 178
Capture Mode Operation ......................................... 129
Comparator Analog Input Model .............................. 229
Comparator I/O Operating Modes ........................... 226
Comparator Output .................................................. 228
Comparator Voltage Reference ............................... 232
Comparator Voltage Reference Output
Buffer Example ................................................ 233
Compare Mode Operation ....................................... 130
Device Clock .............................................................. 30
Enhanced PWM ....................................................... 137
EUSART Receive .................................................... 205
EUSART Transmit ................................................... 203
External Power-on Reset Circuit
A
A/D ................................................................................... 215
A/D Converter Interrupt, Configuring ....................... 219
Acquisition Requirements ........................................ 220
ADCAL Bit ................................................................ 223
ADCON0 Register .................................................... 215
ADCON1 Register .................................................... 215
ADCON2 Register .................................................... 215
ADRESH Register ............................................ 215, 218
ADRESL Register .................................................... 215
Analog Port Pins, Configuring .................................. 221
Associated Registers ............................................... 223
Automatic Acquisition Time ...................................... 221
Calculating the Minimum Required
Acquisition Time .............................................. 220
Calibration ................................................................ 223
Configuring the Module ............................................ 219
Conversion Clock (TAD) ........................................... 221
Conversion Status (GO/DONE Bit) .......................... 218
Conversions ............................................................. 222
Converter Characteristics ........................................ 334
Operation in Power-Managed Modes ...................... 223
Special Event Trigger (ECCP) ......................... 136, 222
Use of the ECCP2 Trigger ....................................... 222
Absolute Maximum Ratings ............................................. 303
AC (Timing) Characteristics ............................................. 317
Load Conditions for Device
(Slow VDD Power-up) ........................................ 43
Fail-Safe Clock Monitor ........................................... 245
Generic I/O Port Operation ........................................ 97
Interrupt Logic ............................................................ 84
2
MSSP (I C Master Mode) ........................................ 176
2
MSSP (I C Mode) .................................................... 159
MSSP (SPI Mode) ................................................... 149
On-Chip Reset Circuit ................................................ 41
PIC18F24J10/25J10 .................................................. 10
PIC18F44J10/45J10 .................................................. 11
PLL ............................................................................ 29
PORTD and PORTE (Parallel Slave Port) ............... 113
PWM Operation (Simplified) .................................... 132
Reads from Flash Program Memory ......................... 75
Single Comparator ................................................... 227
Table Read Operation ............................................... 71
Table Write Operation ............................................... 72
Table Writes to Flash Program Memory .................... 77
Timer0 in 16-Bit Mode ............................................. 116
Timer0 in 8-Bit Mode ............................................... 116
Timer1 ..................................................................... 120
Timer1 (16-Bit Read/Write Mode) ............................ 121
Timer2 ..................................................................... 126
Watchdog Timer ...................................................... 242
BN .................................................................................... 258
BNC ................................................................................. 259
BNN ................................................................................. 259
BNOV .............................................................................. 260
BNZ ................................................................................. 260
BOR. See Brown-out Reset.
BOV ................................................................................. 263
BRA ................................................................................. 261
Break Character (12-Bit) Transmit and Receive .............. 208
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 43
and On-Chip Voltage Regulator .............................. 243
Disabling in Sleep Mode ............................................ 43
BSF .................................................................................. 261
BTFSC ............................................................................. 262
BTFSS ............................................................................. 262
BTG ................................................................................. 263
BZ .................................................................................... 264
Timing Specifications ...................................... 318
Parameter Symbology ............................................. 317
Temperature and Voltage Specifications ................. 318
Timing Conditions .................................................... 318
Access Bank
Mapping with Indexed Literal Offset Mode ................. 70
ACKSTAT ........................................................................ 182
ACKSTAT Status Flag ..................................................... 182
ADCAL Bit ........................................................................ 223
ADCON0 Register ............................................................ 215
GO/DONE Bit ........................................................... 218
ADCON1 Register ............................................................ 215
ADCON2 Register ............................................................ 215
ADDFSR .......................................................................... 292
ADDLW ............................................................................ 255
ADDULNK ........................................................................ 292
ADDWF ............................................................................ 255
ADDWFC ......................................................................... 256
ADRESH Register ............................................................ 215
ADRESL Register .................................................... 215, 218
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 256
ANDWF ............................................................................ 257
Assembler
MPASM Assembler .................................................. 300
Auto-Wake-up on Sync Break Character ......................... 206
B
Bank Select Register (BSR) ............................................... 58
Baud Rate Generator ....................................................... 178
BC .................................................................................... 257
BCF .................................................................................. 258
BF .................................................................................... 182
BF Status Flag ................................................................. 182
C
C Compilers
MPLAB C18 ............................................................. 300
MPLAB C30 ............................................................. 300
© 2009 Microchip Technology Inc.
DS39682E-page 353
MICROCHIP [ MICROCHIP ]
