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PIC18F24J10-I/SO 参数 Datasheet PDF下载

PIC18F24J10-I/SO图片预览
型号: PIC18F24J10-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
Calibration (A/D Converter) ..............................................223  
CALL ................................................................................264  
CALLW .............................................................................293  
Capture (CCP Module) .....................................................129  
Associated Registers ...............................................131  
CCP Pin Configuration .............................................129  
CCPRxH:CCPRxL Registers ...................................129  
Prescaler ..................................................................129  
Software Interrupt ....................................................129  
Capture (ECCP Module) ..................................................136  
Capture/Compare/PWM (CCP) ........................................127  
Capture Mode. See Capture.  
Comparator Voltage Reference ....................................... 231  
Accuracy and Error .................................................. 232  
Associated Registers ............................................... 233  
Configuring .............................................................. 231  
Connection Considerations ...................................... 232  
Effects of a Reset .................................................... 232  
Operation During Sleep ........................................... 232  
Compare (CCP Module) .................................................. 130  
Associated Registers ............................................... 131  
CCPRx Register ...................................................... 130  
Pin Configuration ..................................................... 130  
Software Interrupt .................................................... 130  
Special Event Trigger .............................................. 130  
Timer1 Mode Selection ............................................ 130  
Compare (ECCP Module) ................................................ 136  
Special Event Trigger ...................................... 136, 222  
Computed GOTO ............................................................... 55  
Configuration Bits ............................................................ 235  
Configuration Register Protection .................................... 247  
Context Saving During Interrupts ....................................... 95  
CPFSEQ .......................................................................... 266  
CPFSGT .......................................................................... 267  
CPFSLT ........................................................................... 267  
Crystal Oscillator/Ceramic Resonator ................................ 27  
Customer Change Notification Service ............................ 363  
Customer Notification Service ......................................... 363  
Customer Support ............................................................ 363  
CCP Modules and Timer Resources .......................128  
CCPRxH Register ....................................................128  
CCPRxL Register .....................................................128  
Compare Mode. See Compare.  
Interactions Between ECCP1/CCP1 and  
CCP2 for Timer Resources ..............................128  
Module Configuration ...............................................128  
Clock Sources ....................................................................30  
Default System Clock on Reset .................................31  
Selection Using OSCCON Register ...........................31  
CLRF ................................................................................265  
CLRWDT ..........................................................................265  
Code Examples  
16 x 16 Signed Multiply Routine ................................82  
16 x 16 Unsigned Multiply Routine ............................82  
8 x 8 Signed Multiply Routine ....................................81  
8 x 8 Unsigned Multiply Routine ................................81  
Changing Between Capture Prescalers ...................129  
Computed GOTO Using an Offset Value ...................55  
Erasing a Flash Program Memory Row .....................76  
Fast Register Stack ....................................................55  
How to Clear RAM (Bank 1) Using  
D
Data Addressing Modes .................................................... 66  
Comparing Addressing Modes with the  
Extended Instruction Set Enabled ..................... 69  
Direct ......................................................................... 66  
Indexed Literal Offset ................................................ 68  
Instructions Affected .......................................... 68  
Indirect Addressing ............................................66  
Implementing a Real-Time Clock Using  
Indirect ....................................................................... 66  
Inherent and Literal .................................................... 66  
Data Memory ..................................................................... 58  
Access Bank .............................................................. 60  
and the Extended Instruction Set .............................. 68  
Bank Select Register (BSR) ...................................... 58  
General Purpose Registers ....................................... 60  
Map for PIC18F45J10 Family .................................... 59  
Special Function Registers ........................................ 61  
DAW ................................................................................ 268  
DC Characteristics ........................................................... 313  
Power-Down and Supply Current ............................ 306  
Supply Voltage ........................................................ 305  
DCFSNZ .......................................................................... 269  
DECF ............................................................................... 268  
DECFSZ .......................................................................... 269  
Default System Clock ........................................................ 31  
Development Support ...................................................... 299  
Device Overview .................................................................. 7  
Core Features .............................................................. 7  
Details on Individual Family Members ......................... 8  
Features (table) ........................................................... 9  
Other Special Features ................................................ 8  
Direct Addressing .............................................................. 67  
a Timer1 Interrupt Service ...............................124  
Initializing PORTA ......................................................98  
Initializing PORTB ....................................................101  
Initializing PORTC ....................................................104  
Initializing PORTD ....................................................107  
Initializing PORTE ....................................................110  
Loading the SSP1BUF (SSP1SR) Register .............152  
Reading a Flash Program Memory Word ..................75  
Saving STATUS, WREG and  
BSR Registers in RAM .......................................95  
Writing to Flash Program Memory .............................78  
Code Protection ...............................................................235  
COMF ...............................................................................266  
Comparator ......................................................................225  
Analog Input Connection Considerations .................229  
Associated Registers ...............................................229  
Configuration ............................................................226  
Effects of a Reset .....................................................228  
Interrupts ..................................................................228  
Operation .................................................................227  
Operation During Sleep ...........................................228  
Outputs ....................................................................227  
Reference ................................................................227  
External Signal .................................................227  
Internal Signal ..................................................227  
Response Time ........................................................227  
Comparator Specifications ...............................................316  
DS39682E-page 354  
© 2009 Microchip Technology Inc.