PIC18F2450/4450
REGISTER 8-9:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
OSCFIP
bit 7
U-0
—
R/W-1
USBIP
U-0
—
U-0
—
R/W-1
U-0
—
U-0
—
HLVDIP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1= High priority
0= Low priority
bit 6
bit 5
Unimplemented: Read as ‘0’
USBIP: USB Interrupt Priority bit
1= High priority
0= Low priority
bit 4-3
bit 2
Unimplemented: Read as ‘0’
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit
1= High priority
0= Low priority
bit 1-0
Unimplemented: Read as ‘0’
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 95