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PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2450/4450  
Remapping of the Access Bank applies only to  
operations using the Indexed Literal Offset mode.  
Operations that use the BSR (Access RAM bit is ‘1’) will  
continue to use Direct Addressing as before. Any  
indirect or indexed operation that explicitly uses any of  
the indirect file operands (including FSR2) will continue  
to operate as standard Indirect Addressing. Any  
instruction that uses the Access Bank, but includes a  
register address of greater than 05Fh, will use Direct  
Addressing and the normal Access Bank map.  
5.6.3  
MAPPING THE ACCESS BANK IN  
INDEXED LITERAL OFFSET MODE  
The use of Indexed Literal Offset Addressing mode  
effectively changes how the lower portion of Access  
RAM (00h to 5Fh) is mapped. Rather than containing  
just the contents of the bottom half of Bank 0, this mode  
maps the contents from Bank 0 and a user-defined  
“window” that can be located anywhere in the data  
memory space. The value of FSR2 establishes the  
lower boundary of the addresses mapped into the  
window, while the upper boundary is defined by FSR2  
plus 95 (5Fh). Addresses in the Access RAM above  
5Fh are mapped as previously described (see  
Section 5.3.3 “Access Bank”). An example of Access  
Bank remapping in this addressing mode is shown in  
Figure 5-9.  
5.6.4  
BSR IN INDEXED LITERAL  
OFFSET MODE  
Although the Access Bank is remapped when the  
extended instruction set is enabled, the operation of the  
BSR remains unchanged. Direct Addressing, using the  
BSR to select the data memory bank, operates in the  
same manner as previously described.  
FIGURE 5-9:  
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL  
OFFSET ADDRESSING  
Example Situation:  
000h  
ADDWF f, d, a  
FSR2H:FSR2L = 120h  
Bank 0  
Locations in the region  
from the FSR2 Pointer  
(120h) to the pointer plus  
05Fh (17Fh) are mapped  
to the bottom of the  
Access RAM (000h-05Fh).  
100h  
120h  
17Fh  
Window  
Bank 1  
00h  
Bank 1 “Window”  
200h  
5Fh  
60h  
Special Function Regis-  
ters at F60h through FFFh  
are mapped to 60h  
through FFh as usual.  
Bank 2  
through  
Bank 14  
SFRs  
Bank 0 addresses below  
5Fh are not available in  
this mode. They can still  
be addressed by using the  
BSR.  
FFh  
Access Bank  
F00h  
F60h  
Bank 15  
SFRs  
FFFh  
Data Memory  
DS39760A-page 72  
Advance Information  
© 2006 Microchip Technology Inc.  
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