PIC18F2450/4450
UEPn (USB Endpoint n Control) .............................. 135
UIE (USB Interrupt Enable) ..................................... 145
UIR (USB Interrupt Status) ...................................... 144
USTAT (USB Status) ............................................... 134
WDTCON (Watchdog Timer Control) ...................... 202
RESET ............................................................................. 241
Reset State of Registers .................................................... 48
Reset Timers ..................................................................... 45
Oscillator Start-up Timer (OST) ................................. 45
PLL Lock Time-out ..................................................... 45
Power-up Timer (PWRT) ........................................... 45
Resets ........................................................................ 41, 189
Brown-out Reset (BOR) ........................................... 189
Oscillator Start-up Timer (OST) ............................... 189
Power-on Reset (POR) ............................................ 189
Power-up Timer (PWRT) ......................................... 189
RETFIE ............................................................................ 242
RETLW ............................................................................ 242
RETURN .......................................................................... 243
Return Address Stack ........................................................ 54
and Associated Registers .......................................... 54
Return Stack Pointer (STKPTR) ........................................ 55
Revision History ............................................................... 303
RLCF ............................................................................... 243
RLNCF ............................................................................. 244
RRCF ............................................................................... 244
RRNCF ............................................................................ 245
R
RAM. See Data Memory.
RC_IDLE Mode ..................................................................39
RC_RUN Mode ..................................................................35
RCALL ..............................................................................241
RCON Register
Bit Status During Initialization ....................................48
Reader Response ............................................................316
Register File Summary ................................................. 63–65
Registers
ADCON0 (A/D Control 0) .........................................173
ADCON1 (A/D Control 1) .........................................174
ADCON2 (A/D Control 2) .........................................175
BAUDCON (Baud Rate Control) ..............................156
BDnSTAT (Buffer Descriptor n Status,
CPU Mode) ......................................................139
BDnSTAT (Buffer Descriptor n Status,
SIE Mode) ........................................................140
CCP1CON (Capture/Compare/PWM
Control) ............................................................123
CONFIG1H (Configuration 1 High) ..........................192
CONFIG1L (Configuration 1 Low) ............................191
CONFIG2H (Configuration 2 High) ..........................194
CONFIG2L (Configuration 2 Low) ............................193
CONFIG3H (Configuration 3 High) ..........................195
CONFIG4L (Configuration 4 Low) ............................196
CONFIG5H (Configuration 5 High) ..........................197
CONFIG5L (Configuration 5 Low) ............................197
CONFIG6H (Configuration 6 High) ..........................198
CONFIG6L (Configuration 6 Low) ............................198
CONFIG7H (Configuration 7 High) ..........................199
CONFIG7L (Configuration 7 Low) ............................199
DEVID1 (Device ID 1) ..............................................200
DEVID2 (Device ID 2) ..............................................200
EECON1 (Memory Control 1) ....................................75
HLVDCON (High/Low-Voltage
Detect Control) .................................................183
INTCON (Interrupt Control) ........................................87
INTCON2 (Interrupt Control 2) ...................................88
INTCON3 (Interrupt Control 3) ...................................89
IPR1 (Peripheral Interrupt Priority 1) ..........................94
IPR2 (Peripheral Interrupt Priority 2) ..........................95
OSCCON (Oscillator Control) ....................................31
PIE1 (Peripheral Interrupt Enable 1) ..........................92
PIE2 (Peripheral Interrupt Enable 2) ..........................93
PIR1 (Peripheral Interrupt Request
S
SEC_IDLE Mode ............................................................... 38
SEC_RUN Mode ................................................................ 34
SETF ................................................................................ 245
Single-Supply ICSP Programming ................................... 210
SLEEP ............................................................................. 246
Sleep
OSC1 and OSC2 Pin States ...................................... 32
Sleep Mode ........................................................................ 37
Software Simulator (MPLAB SIM) ................................... 262
Special Event Trigger. See Compare (CCP Module).
Special Features of the CPU ........................................... 189
Special ICPORT Features ............................................... 209
Stack Full/Underflow Resets .............................................. 56
STATUS Register .............................................................. 66
SUBFSR .......................................................................... 257
SUBFWB ......................................................................... 246
SUBLW ............................................................................ 247
SUBULNK ........................................................................ 257
SUBWF ............................................................................ 247
SUBWFB ......................................................................... 248
SWAPF ............................................................................ 248
(Flag) 1) .............................................................90
PIR2 (Peripheral Interrupt Request
(Flag) 2) .............................................................91
PORTE .....................................................................109
RCON (Reset Control) ......................................... 42, 96
RCSTA (Receive Status and Control) ......................155
STATUS .....................................................................66
STKPTR (Stack Pointer) ............................................55
T0CON (Timer0 Control) ..........................................111
T1CON (Timer1 Control) ..........................................115
T2CON (Timer2 Control) ..........................................121
TXSTA (Transmit Status and Control) .....................154
UCFG (USB Configuration) ......................................132
UCON (USB Control) ...............................................130
UEIE (USB Error Interrupt Enable) ..........................147
UEIR (USB Error Interrupt Status) ...........................146
T
T0CON Register
PSA Bit .................................................................... 113
T0CS Bit .................................................................. 112
T0PS2:T0PS0 Bits ................................................... 113
T0SE Bit .................................................................. 112
Table Pointer Operations (table) ........................................ 76
Table Reads/Table Writes ................................................. 56
TBLRD ............................................................................. 249
TBLWT ............................................................................. 250
Time-out in Various Situations (table) ................................ 45
Time-out Sequence ........................................................... 45
DS39760A-page 312
Advance Information
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
