PIC18F2450/4450
RB5/KBI1/PGM .................................................... 14, 18
RB6/KBI2/PGC .................................................... 14, 18
RB7/KBI3/PGD .................................................... 14, 18
RC0/T1OSO/T1CKI ............................................. 15, 19
RC1/T1OSI/UOE .................................................. 15, 19
RC2/CCP1 ........................................................... 15, 19
RC4/D-/VM ........................................................... 15, 19
RC5/D+/VP .......................................................... 15, 19
RC6/TX/CK .......................................................... 15, 19
RC7/RX/DT .......................................................... 15, 19
RD0 ............................................................................ 20
RD1 ............................................................................ 20
RD2 ............................................................................ 20
RD3 ............................................................................ 20
RD4 ............................................................................ 20
RD5 ............................................................................ 20
RD6 ............................................................................ 20
RD7 ............................................................................ 20
RE0/AN5 .................................................................... 21
RE1/AN6 .................................................................... 21
RE2/AN7 .................................................................... 21
VDD ...................................................................... 15, 21
VSS ....................................................................... 15, 21
VUSB ..................................................................... 15, 21
Pinout I/O Descriptions
Postscaler, WDT
Assignment (PSA Bit) .............................................. 113
Rate Select (T0PS2:T0PS0 Bits) ............................. 113
Power-Managed Modes ..................................................... 33
and A/D Operation ................................................... 180
Clock Sources ........................................................... 33
Clock Transitions and Status Indicators .................... 34
Effects on Various Clock Sources ............................. 32
Entering ..................................................................... 33
Exiting Idle and Sleep Modes .................................... 39
by Interrupt ........................................................ 39
by Reset ............................................................ 39
by WDT Time-out .............................................. 39
Without an Oscillator Start-up Delay ................. 40
Idle ............................................................................. 37
Idle Modes
PRI_IDLE .......................................................... 38
RC_IDLE ........................................................... 39
SEC_IDLE ......................................................... 38
Multiple Sleep Commands ......................................... 34
Run Modes ................................................................ 34
PRI_RUN ........................................................... 34
RC_RUN ............................................................ 35
SEC_RUN ......................................................... 34
Selecting .................................................................... 33
Sleep ......................................................................... 37
Summary (table) ........................................................ 33
Power-on Reset (POR) ...................................................... 43
Power-up Delays ............................................................... 32
Power-up Timer (PWRT) ............................................. 32, 45
Prescaler, Timer0 ............................................................ 113
Assignment (PSA Bit) .............................................. 113
Rate Select (T0PS2:T0PS0 Bits) ............................. 113
Prescaler, Timer2 ............................................................ 128
PRI_IDLE Mode ................................................................. 38
PRI_RUN Mode ................................................................. 34
Program Counter ............................................................... 54
PCL, PCH and PCU Registers .................................. 54
PCLATH and PCLATU Registers .............................. 54
Program Memory
and the Extended Instruction Set .............................. 70
Code Protection ....................................................... 207
Instructions ................................................................ 58
Two-Word .......................................................... 58
Interrupt Vector .......................................................... 53
Look-up Tables .......................................................... 56
Map and Stack (diagram) .......................................... 53
Reset Vector .............................................................. 53
Program Verification and Code Protection ...................... 206
Associated Registers ............................................... 206
Programming, Device Instructions ................................... 211
Pulse-Width Modulation. See PWM (CCP Module).
PUSH ............................................................................... 240
PUSH and POP Instructions .............................................. 55
PUSHL ............................................................................. 256
PWM (CCP Module)
PIC18F2450 ............................................................... 12
PIC18F4450 ............................................................... 16
PIR Registers ..................................................................... 90
PLL Frequency Multiplier ................................................... 26
HSPLL, XTPLL, ECPLL and ECPIO
Oscillator Modes ................................................ 26
PLL Lock Time-out ............................................................. 45
POP ................................................................................. 240
POR. See Power-on Reset.
PORTA
Associated Registers ............................................... 100
I/O Summary ............................................................ 100
LATA Register ............................................................ 99
PORTA Register ........................................................ 99
TRISA Register .......................................................... 99
PORTB
Associated Registers ............................................... 103
I/O Summary ............................................................ 102
LATB Register .......................................................... 101
PORTB Register ...................................................... 101
RB7:RB4 Interrupt-on-Change Flag
(RBIF Bit) ......................................................... 101
TRISB Register ........................................................ 101
PORTC
Associated Registers ............................................... 106
I/O Summary ............................................................ 105
LATC Register ......................................................... 104
PORTC Register ...................................................... 104
TRISC Register ........................................................ 104
PORTD
Associated Registers ............................................... 108
I/O Summary ............................................................ 108
LATD Register ......................................................... 107
PORTD Register ...................................................... 107
TRISD Register ........................................................ 107
PORTE
Associated Registers ............................................... 128
Duty Cycle ............................................................... 127
Example Frequencies/Resolutions .......................... 128
Period ...................................................................... 127
Setup for PWM Operation ....................................... 128
TMR2 to PR2 Match ................................................ 127
Associated Registers ............................................... 110
I/O Summary ............................................................ 110
LATE Register .......................................................... 109
PORTE Register ...................................................... 109
TRISE Register ........................................................ 109
Q
Q Clock ............................................................................ 128
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 311
MICROCHIP [ MICROCHIP ]
