PIC18F2450/4450
Code Examples
DC Characteristics ........................................................... 276
Power-Down and Supply Current ............................ 268
Supply Voltage ........................................................ 267
DCFSNZ .......................................................................... 231
DECF ............................................................................... 230
DECFSZ .......................................................................... 231
Dedicated ICD/ICSP Port ................................................ 209
Development Support ...................................................... 261
Device Differences ........................................................... 303
Device Overview .................................................................. 7
Features (table) ........................................................... 9
New Core Features ...................................................... 7
Other Special Features ................................................ 8
Direct Addressing .............................................................. 68
16 x 16 Signed Multiply Routine ................................84
16 x 16 Unsigned Multiply Routine ............................84
8 x 8 Signed Multiply Routine ....................................83
8 x 8 Unsigned Multiply Routine ................................83
Changing Between Capture Prescalers ...................124
Computed GOTO Using an Offset Value ...................56
Erasing a Flash Program Memory Row .....................78
Fast Register Stack ....................................................56
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................67
Implementing a Real-Time Clock Using
a Timer1 Interrupt Service ...............................119
Initializing PORTA ......................................................99
Initializing PORTB ....................................................101
Initializing PORTC ....................................................104
Initializing PORTD ....................................................107
Initializing PORTE ....................................................109
Reading a Flash Program Memory Word ..................77
Saving STATUS, WREG and
E
Effect on Standard PIC MCU Instructions ....................... 258
Electrical Characteristics ................................................. 265
Enhanced Universal Synchronous Receiver
Transmitter (USART). See EUSART.
Equations
BSR Registers in RAM .......................................97
Writing to Flash Program Memory ....................... 80–81
Code Protection ...............................................................189
COMF ...............................................................................228
Compare (CCP Module) ...................................................125
Associated Registers ...............................................126
CCP1 Pin Configuration ...........................................125
CCPR1 Register ......................................................125
Software Interrupt ....................................................125
Special Event Trigger ...............................................125
Timer1 Mode Selection ............................................125
Configuration Bits .............................................................190
Configuration Register Protection ....................................209
Context Saving During Interrupts .......................................97
Conversion Considerations ..............................................304
CPFSEQ ..........................................................................228
CPFSGT ...........................................................................229
CPFSLT ...........................................................................229
Crystal Oscillator/Ceramic Resonator ................................25
Customer Change Notification Service ............................315
Customer Notification Service ..........................................315
Customer Support ............................................................315
A/D Acquisition Time ............................................... 178
A/D Minimum Charging Time ................................... 178
Calculating the Minimum Required
A/D Acquisition Time ....................................... 178
Errata ................................................................................... 6
EUSART
Asynchronous Mode ................................................ 162
Associated Registers, Receive ........................ 165
Associated Registers, Transmit ....................... 163
Auto-Wake-up on Sync Break ......................... 166
Break Character Sequence ............................. 167
Receiver .......................................................... 164
Setting Up 9-Bit Mode with Address Detect .... 164
Transmitter ...................................................... 162
Baud Rate Generator (BRG) ................................... 157
Associated Registers ....................................... 157
Auto-Baud Rate Detect .................................... 160
Baud Rate Error, Calculating ........................... 157
Baud Rates, Asynchronous Modes ................. 158
High Baud Rate Select (BRGH Bit) ................. 157
Operation in Power-Managed Modes .............. 157
Sampling .......................................................... 157
Synchronous Master Mode ...................................... 168
Associated Registers, Receive ........................ 170
Associated Registers, Transmit ....................... 169
Reception ........................................................ 170
Transmission ................................................... 168
Synchronous Slave Mode ........................................ 171
Associated Registers, Receive ........................ 172
Associated Registers, Transmit ....................... 171
Reception ........................................................ 172
Transmission ................................................... 171
Extended Instruction Set .................................................. 253
ADDFSR .................................................................. 254
ADDULNK ................................................................ 254
and Using MPLAB IDE Tools ................................... 260
CALLW .................................................................... 255
Considerations for Use ............................................ 258
MOVSF .................................................................... 255
MOVSS .................................................................... 256
PUSHL ..................................................................... 256
SUBFSR .................................................................. 257
SUBULNK ................................................................ 257
Syntax ...................................................................... 253
External Clock Input ........................................................... 26
D
Data Addressing Modes .....................................................67
Comparing Addressing Modes with
the Extended Instruction Set Enabled ................71
Direct ..........................................................................67
Indexed Literal Offset .................................................70
BSR Operation ...................................................72
Instructions Affected ..........................................70
Mapping the Access Bank .................................72
Indirect .......................................................................67
Inherent and Literal ....................................................67
Data Memory ......................................................................59
Access Bank ..............................................................61
and the Extended Instruction Set ...............................70
Bank Select Register (BSR) .......................................59
General Purpose Registers ........................................61
Map for PIC18F2450/4450 Devices ...........................60
Special Function Registers ........................................62
Map ....................................................................62
USB RAM ...................................................................59
DAW .................................................................................230
DC and AC Characteristics
Graphs and Tables ..................................................293
DS39760A-page 308
Advance Information
© 2006 Microchip Technology Inc.