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PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2450/4450  
Instruction Cycle ................................................................ 57  
Clocking Scheme ....................................................... 57  
Flow/Pipelining .......................................................... 57  
Instruction Set .................................................................. 211  
ADDLW .................................................................... 217  
ADDWF ................................................................... 217  
ADDWF (Indexed Literal Offset mode) .................... 259  
ADDWFC ................................................................. 218  
ANDLW .................................................................... 218  
ANDWF ................................................................... 219  
BC ............................................................................ 219  
BCF ......................................................................... 220  
BN ............................................................................ 220  
BNC ......................................................................... 221  
BNN ......................................................................... 221  
BNOV ...................................................................... 222  
BNZ ......................................................................... 222  
BOV ......................................................................... 225  
BRA ......................................................................... 223  
BSF .......................................................................... 223  
BSF (Indexed Literal Offset mode) .......................... 259  
BTFSC ..................................................................... 224  
BTFSS ..................................................................... 224  
BTG ......................................................................... 225  
BZ ............................................................................ 226  
CALL ........................................................................ 226  
CLRF ....................................................................... 227  
CLRWDT ................................................................. 227  
COMF ...................................................................... 228  
CPFSEQ .................................................................. 228  
CPFSGT .................................................................. 229  
CPFSLT ................................................................... 229  
DAW ........................................................................ 230  
DCFSNZ .................................................................. 231  
DECF ....................................................................... 230  
DECFSZ .................................................................. 231  
General Format ....................................................... 213  
GOTO ...................................................................... 232  
INCF ........................................................................ 232  
INCFSZ .................................................................... 233  
INFSNZ .................................................................... 233  
IORLW ..................................................................... 234  
IORWF ..................................................................... 234  
LFSR ....................................................................... 235  
MOVF ...................................................................... 235  
MOVFF .................................................................... 236  
MOVLB .................................................................... 236  
MOVLW ................................................................... 237  
MOVWF ................................................................... 237  
MULLW .................................................................... 238  
MULWF ................................................................... 238  
NEGF ....................................................................... 239  
NOP ......................................................................... 239  
Opcode Field Descriptions ...................................... 212  
POP ......................................................................... 240  
PUSH ....................................................................... 240  
RCALL ..................................................................... 241  
RESET ..................................................................... 241  
RETFIE .................................................................... 242  
RETLW .................................................................... 242  
RETURN .................................................................. 243  
RLCF ....................................................................... 243  
RLNCF ..................................................................... 244  
F
Fail-Safe Clock Monitor ............................................ 189, 204  
Interrupts in Power-Managed Modes ....................... 205  
POR or Wake-up from Sleep ................................... 205  
WDT During Oscillator Failure ................................. 204  
Fast Register Stack ............................................................ 56  
Firmware Instructions ....................................................... 211  
Flash Program Memory ..................................................... 73  
Associated Registers ................................................. 81  
Control Registers ....................................................... 74  
EECON1 and EECON2 ..................................... 74  
TABLAT (Table Latch) Register ......................... 76  
TBLPTR (Table Pointer) Register ...................... 76  
Erase Sequence ........................................................ 78  
Erasing ....................................................................... 78  
Operation During Code-Protect ................................. 81  
Protection Against Spurious Writes ........................... 81  
Reading ...................................................................... 77  
Table Pointer  
Boundaries Based on Operation ........................ 76  
Table Pointer Boundaries .......................................... 76  
Table Reads and Table Writes .................................. 73  
Unexpected Termination of Write .............................. 81  
Write Sequence ......................................................... 79  
Write Verify ................................................................ 81  
Writing To ................................................................... 79  
FSCM. See Fail-Safe Clock Monitor.  
G
GOTO .............................................................................. 232  
H
Hardware Multiplier ............................................................ 83  
Introduction ................................................................ 83  
Operation ................................................................... 83  
Performance Comparison .......................................... 83  
High/Low-Voltage Detect ................................................. 183  
Applications .............................................................. 186  
Associated Registers ............................................... 187  
Characteristics ......................................................... 280  
Current Consumption ............................................... 185  
Effects of a Reset ..................................................... 187  
Operation ................................................................. 184  
During Sleep .................................................... 187  
Setup ........................................................................ 185  
Start-up Time ........................................................... 185  
Typical Application ................................................... 186  
HLVD. See High/Low-Voltage Detect.  
I
I/O Ports ............................................................................. 99  
ID Locations ............................................................. 189, 209  
Idle Modes ......................................................................... 37  
INCF ................................................................................. 232  
INCFSZ ............................................................................ 233  
In-Circuit Debugger .......................................................... 209  
In-Circuit Serial Programming (ICSP) ...................... 189, 209  
Indexed Literal Offset Addressing  
and Standard PIC18 Instructions ............................. 258  
Indexed Literal Offset Mode ............................................. 258  
Indirect Addressing ............................................................ 68  
INFSNZ ............................................................................ 233  
Initialization Conditions for all Registers ...................... 49–52  
© 2006 Microchip Technology Inc.  
Advance Information  
DS39760A-page 309