PIC18F2450/4450
REGISTER 18-7: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/C-1
CP1
R/C-1
CP0
bit 7
bit 0
Legend:
R = Readable bit
C = Clearable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
u = Unchanged from programmed state
bit 7-2
bit 1
Unimplemented: Read as ‘0’
CP1: Code Protection bit
1= Block 1 (002000-003FFFh) is not code-protected
0= Block 1 (002000-003FFFh) is code-protected
bit 0
CP0: Code Protection bit
1= Block 0 (000800-001FFFh) or (001000-001FFFh) is not code-protected
0= Block 0 (000800-001FFFh) or (001000-001FFFh) is code-protected
REGISTER 18-8: CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
U-0
—
R/C-1
CPB
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
bit 7
bit 0
Legend:
R = Readable bit
C = Clearable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
u = Unchanged from programmed state
bit 7
bit 6
Unimplemented: Read as ‘0’
CPB: Boot Block Code Protection bit
1= Boot block (000000-0007FFh) or (000000-000FFFh) is not code-protected
0= Boot block (000000-0007FFh) or (000000-000FFFh) is code-protected
bit 5-0
Unimplemented: Read as ‘0’
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 197