PIC18F2450/4450
REGISTER 18-5: CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
R/P-1
U-0
—
U-0
—
U-0
—
U-0
—
R/P-0
R/P-1
U-0
—
MCLRE
LPT1OSC
PBADEN
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
u = Unchanged from programmed state
bit 7
MCLRE: MCLR Pin Enable bit
1= MCLR pin enabled, RA5 input pin disabled
0= RA5 input pin enabled, MCLR pin disabled
bit 6-3
bit 2
Unimplemented: Read as ‘0’
LPT1OSC: Low-Power Timer1 Oscillator Enable bit
1= Timer1 configured for low-power operation
0= Timer1 configured for higher power operation
bit 1
bit 0
PBADEN: PORTB A/D Enable bit
(Affects ADCON1 Reset state. ADCON1 controls PORTB<4:0> pin configuration.)
1= PORTB<4:0> pins are configured as analog input channels on Reset
0= PORTB<4:0> pins are configured as digital I/O on Reset
Unimplemented: Read as ‘0’
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 195
MICROCHIP [ MICROCHIP ]
