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PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2450/4450  
14.2.5  
USB ADDRESS REGISTER  
(UADDR)  
FIGURE 14-5:  
IMPLEMENTATION OF  
USB RAM IN DATA  
MEMORY SPACE  
The USB Address register contains the unique USB  
address that the peripheral will decode when active.  
UADDR is reset to 00h when a USB Reset is received,  
indicated by URSTIF, or when a Reset is received from  
the microcontroller. The USB address must be written  
by the microcontroller during the USB setup phase  
(enumeration) as part of the Microchip USB firmware  
support.  
000h  
Banks 0  
to 1  
User Data  
1FFh  
200h  
Banks 2  
to 3  
Unused  
3FFh  
400h  
Buffer Descriptors,  
14.2.6  
USB FRAME NUMBER REGISTERS  
(UFRMH:UFRML)  
Bank 4  
USB Data or User Data  
4FFh  
500h  
The Frame Number registers contain the 11-bit frame  
number. The low-order byte is contained in UFRML,  
while the three high-order bits are contained in  
UFRMH. The register pair is updated with the current  
frame number whenever a SOF token is received. For  
the microcontroller, these registers are read-only. The  
Frame Number register is primarily used for  
isochronous transfers.  
USB Data or  
User Data  
7FFh  
800h  
Banks 5  
to 14  
Unused  
14.3 USB RAM  
USB data moves between the microcontroller core and  
the SIE through a memory space known as the USB  
RAM. This is a special dual port memory that is  
mapped into the normal data memory space in Bank 4  
(400h to 4FFh) for a total of 256 bytes (Figure 14-5).  
Some portion of Bank 4 (400h through 4FFh) is used  
specifically for endpoint buffer control, while the  
remaining portion is available for USB data. Depending  
on the type of buffering being used, all but 8 bytes of  
Bank 4 may also be available for use as USB buffer  
space.  
F00h  
F80h  
FFFh  
Bank15  
SFRs  
Although USB RAM is available to the microcontroller  
as data memory, the sections that are being accessed  
by the SIE should not be accessed by the  
microcontroller. A semaphore mechanism is used to  
determine the access to a particular buffer at any given  
time. This is discussed in Section 14.4.1.1 “Buffer  
Ownership”.  
DS39760A-page 136  
Advance Information  
© 2006 Microchip Technology Inc.  
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