PIC18F2450/4450
EXAMPLE 9-4:
INITIALIZING PORTD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
9.4
PORTD, TRISD and LATD
Registers
CLRF
PORTD
Note:
PORTD is only available on 40/44-pin
devices.
CLRF
LATD
PORTD is an 8-bit wide, bidirectional port. The
corresponding data direction register is TRISD. Setting
a TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISD bit (= 0)
will make the corresponding PORTD pin an output (i.e.,
put the contents of the output latch on the selected pin).
MOVLW
MOVWF
0CFh
TRISD
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
Note:
On a Power-on Reset, these pins are
configured as digital inputs.
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 107
MICROCHIP [ MICROCHIP ]
