PIC18F45J10 FAMILY
REGISTER 9-5:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
R/W-0
OSCFIF
bit 7
R/W-0
CMIF
U-0
—
U-0
—
R/W-0
BCLIF
U-0
—
U-0
—
R/W-0
CCP2IF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
bit 6
OSCFIF: Oscillator Fail Interrupt Flag bit
1= Device oscillator failed, clock input has changed to INTOSC (must be cleared in software)
0= Device clock operating
CMIF: Comparator Interrupt Flag bit
1= Comparator input has changed (must be cleared in software)
0= Comparator input has not changed
bit 5-4
bit 3
Unimplemented: Read as ‘0’
BCLIF: Bus Collision Interrupt Flag bit (MSSP1 module)
1= A bus collision occurred (must be cleared in software)
0= No bus collision occurred
bit 2-1
bit 0
Unimplemented: Read as ‘0’
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1= A TMR1 register capture occurred (must be cleared in software)
0= No TMR1 register capture occurred
Compare mode:
1= A TMR1 register compare match occurred (must be cleared in software)
0= No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
REGISTER 9-6:
PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
R/W-0
SSP2IF
bit 7
R/W-0
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
BCL2IF
bit 0
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 7
SSP2IF: Master Synchronous Serial Port 2 Interrupt Flag bit
1= The transmission/reception is complete (must be cleared in software)
0= Waiting to transmit/receive
bit 6
BCL2IF: Bus Collision Interrupt Flag bit (MSSP2 module)
1= A bus collision occurred (must be cleared in software)
0= No bus collision occurred
bit 5-0
Unimplemented: Read as ‘0’
© 2009 Microchip Technology Inc.
DS39682E-page 89
MICROCHIP [ MICROCHIP ]
