PIC18FXX20
SLEEP
Enter SLEEP mode
SUBFWB
Subtract f from W with borrow
Syntax:
[ label ] SLEEP
Syntax:
[ label ] SUBFWB f [,d [,a]
Operands:
Operation:
None
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) – (f) – (C) → dest
N, OV, C, DC, Z
00h → WDT,
0 → WDT postscaler,
1 → TO,
0 → PD
TO, PD
Operation:
Status Affected:
Encoding:
Status Affected:
Encoding:
Description:
0101
01da
ffff
ffff
0000
0000
0000
0011
Description:
Subtract register 'f' and carry flag
(borrow) from W (2’s complement
method). If 'd' is 0, the result is
stored in W. If 'd' is 1, the result is
stored in register 'f' (default). If ‘a’ is
0, the Access Bank will be selected,
overriding the BSR value. If ‘a’ is 1,
then the bank will be selected as
per the BSR value (default).
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
1
1
Words:
Cycles:
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
No
operation
Q3
Process
Data
Q4
Go to
sleep
Q Cycle Activity:
Q1
Decode
Q2
Q3
Q4
Write to
Decode
Read
Process
register 'f'
Data
destination
SLEEP
Example:
SUBFWB
REG, 1, 0
Example 1:
Before Instruction
TO
PD
=
=
?
?
Before Instruction
REG
=
3
After Instruction
W
=
2
C
=
1
TO
PD
=
=
1 †
0
After Instruction
REG
W
=
=
FF
2
† If WDT causes wake-up, this bit is cleared.
C
Z
=
=
=
0
0
1
N
; result is negative
SUBFWB
REG, 0, 0
Example 2:
Before Instruction
REG
=
2
W
=
5
C
=
1
After Instruction
REG
W
=
=
2
3
C
Z
=
=
=
1
0
0
N
; result is positive
SUBFWB
REG, 1, 0
Example 3:
Before Instruction
REG
=
1
W
=
2
C
=
0
After Instruction
REG
W
=
=
0
2
C
Z
=
=
=
1
1
0
; result is zero
N
DS39609A-page 294
Advance Information
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
