PIC18FXX20
RRNCF
Rotate Right f (no carry)
SETF
Set f
Syntax:
[ label ] RRNCF f [,d [,a]
Syntax:
[label] SETF f [,a]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f<n>) → dest<n-1>,
(f<0>) → dest<7>
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
FFh → f
None
0110
Operation:
Status Affected:
Encoding:
Operation:
100a
ffff
ffff
Status Affected:
Encoding:
Description:
N, Z
0100
Description:
The contents of the specified regis-
ter are set to FFh. If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ is 1, then
the bank will be selected as per the
BSR value (default).
1
1
00da
ffff
ffff
The contents of register 'f' are
rotated one bit to the right. If 'd' is 0,
the result is placed in W. If 'd' is 1,
the result is placed back in register
'f' (default). If ‘a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ is 1, then the
bank will be selected as per the
BSR value (default).
Words:
Cycles:
Q Cycle Activity:
Q1
Q2
Q3
Q4
Write
register f
Decode
Read
Process
register 'f'
Data
register 'f'
Words:
Cycles:
1
1
SETF
REG,1
Example:
Before Instruction
Q Cycle Activity:
Q1
REG
=
0x5A
0xFF
Q2
Q3
Q4
After Instruction
Decode
Read
register 'f'
Process
Write to
REG
=
Data
destination
RRNCF
REG, 1, 0
Example 1:
Before Instruction
REG
=
1101 0111
1110 1011
RRNCF REG, 0, 0
After Instruction
REG
=
Example 2:
Before Instruction
W
=
?
REG
=
1101 0111
After Instruction
W
=
1110 1011
1101 0111
REG
=
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 293
MICROCHIP [ MICROCHIP ]
