欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F8620-I/PT的Datasheet PDF文件第294页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第295页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第296页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第297页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第299页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第300页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第301页浏览型号PIC18F8620-I/PT的Datasheet PDF文件第302页  
PIC18FXX20  
SUBWFB  
Syntax:  
Subtract W from f with Borrow  
SWAPF  
Swap f  
Syntax:  
[ label ] SWAPF f [,d [,a]  
[ label ] SUBWFB f [,d [,a]  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
Operation:  
(f<3:0>) dest<7:4>,  
(f<7:4>) dest<3:0>  
None  
Operation:  
Status Affected: N, OV, C, DC, Z  
Encoding:  
Description:  
(f) – (W) – (C) dest  
Status Affected:  
Encoding:  
Description:  
0101  
10da  
ffff  
ffff  
0011  
10da  
ffff  
ffff  
Subtract W and the carry flag (bor-  
row) from register 'f' (2’s complement  
method). If 'd' is 0, the result is stored  
in W. If 'd' is 1, the result is stored  
back in register 'f' (default). If ‘a’ is 0,  
the Access Bank will be selected,  
overriding the BSR value. If ‘a’ is 1,  
then the bank will be selected as per  
the BSR value (default).  
The upper and lower nibbles of reg-  
ister 'f' are exchanged. If 'd' is 0, the  
result is placed in W. If 'd' is 1, the  
result is placed in register 'f'  
(default). If ‘a’ is 0, the Access  
Bank will be selected, overriding  
the BSR value. If ‘a’ is 1, then the  
bank will be selected as per the  
BSR value (default).  
Words:  
Cycles:  
1
1
Words:  
Cycles:  
1
1
Q Cycle Activity:  
Q1  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Process  
Data  
Q4  
Q2  
Q3  
Process  
Data  
Q4  
Decode  
Read  
Write to  
Decode  
Read  
Write to  
register 'f'  
destination  
register 'f'  
destination  
SUBWFB REG, 1, 0  
Example 1:  
Before Instruction  
SWAPF  
REG, 1, 0  
Example:  
REG  
=
0x19  
(0001 1001)  
(0000 1101)  
Before Instruction  
W
C
=
0x0D  
REG  
=
0x53  
0x35  
=
1
After Instruction  
After Instruction  
REG  
=
REG  
=
=
0x0C  
0x0D  
(0000 1011)  
(0000 1101)  
W
C
=
=
=
1
0
0
Z
N
; result is positive  
SUBWFB REG, 0, 0  
Example 2:  
Before Instruction  
REG  
=
0x1B  
(0001 1011)  
(0001 1010)  
W
C
=
0x1A  
=
0
After Instruction  
REG  
W
=
=
0x1B  
0x00  
(0001 1011)  
C
Z
=
=
=
1
1
0
; result is zero  
N
SUBWFB REG, 1, 0  
Example 3:  
Before Instruction  
REG  
=
0x03  
(0000 0011)  
(0000 1101)  
W
C
=
0x0E  
=
1
After Instruction  
REG  
=
0xF5  
0x0E  
(1111 0100)  
; [2’s comp]  
(0000 1101)  
W
=
C
=
=
=
0
0
1
Z
N
; result is negative  
DS39609A-page 296  
Advance Information  
2003 Microchip Technology Inc.  
 复制成功!