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PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
NEGF  
Negate f  
NOP  
No Operation  
Syntax:  
Operands:  
[label] NEGF f [,a]  
0 f 255  
a [0,1]  
( f ) + 1 f  
N, OV, C, DC, Z  
Syntax:  
[ label ] NOP  
None  
No operation  
None  
Operands:  
Operation:  
Status Affected:  
Encoding:  
Operation:  
Status Affected:  
Encoding:  
0000  
1111  
0000  
xxxx  
0000  
xxxx  
0000  
xxxx  
0110  
110a  
ffff  
ffff  
Description:  
Words:  
Cycles:  
No operation.  
1
1
Description:  
Location ‘f’ is negated using two’s  
complement. The result is placed in  
the data memory location 'f'. If ‘a’ is  
0, the Access Bank will be  
Q Cycle Activity:  
Q1  
selected, overriding the BSR value.  
If ‘a’ = 1, then the bank will be  
selected as per the BSR value.  
Q2  
No  
operation  
Q3  
No  
Q4  
Decode  
No  
operation  
operation  
Words:  
Cycles:  
1
1
Example:  
None.  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read  
Process  
Write  
register 'f'  
Data  
register 'f'  
NEGF  
REG, 1  
Example:  
Before Instruction  
REG  
=
0011 1010 [0x3A]  
1100 0110 [0xC6]  
After Instruction  
REG  
=
2003 Microchip Technology Inc.  
Advance Information  
DS39609A-page 287  
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