PIC18FXX20
FIGURE 23-3:
CODE PROTECTED PROGRAM MEMORY FOR PIC18FX520 DEVICES
Address
Range
Block Code Protection
Controlled By:
32 Kbytes
000000h
0007FFh
000800h
001FFFh
Boot Block
Block 0
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
002000h
Block 1
Block 2
Block 3
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
003FFFh
004000h
005FFFh
006000h
007FFFh
008000h
Unimplemented
Read ‘0’s
1FFFFFh
FIGURE 23-4:
CODE PROTECTED PROGRAM MEMORY FOR PIC18FX620/X720 DEVICES
MEMORY SIZE / DEVICE
Block Code Protection
Controlled By:
64 Kbytes
128 Kbytes
Address
Range
(PIC18FX620)
(PIC18FX720)
000000h
0001FFh
000200h
003FFFh
Boot Block
Boot Block
Block 0
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
Block 0
Block 1
004000h
Block 1
Block 2
Block 3
Block 4
Block 5
Block 6
Block 7
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
CP4, WRT4, EBTR4
CP5, WRT5, EBTR5
CP6, WRT6, EBTR6
CP7, WRT7, EBTR7
007FFFh
008000h
Block 2
Block 3
00BFFFh
00C000h
00FFFFh
010000h
013FFFh
014000h
017FFFh
018000h
Unimplemented
Read ‘0’s
01BFFFh
01C000h
01FFFFh
DS39609A-page 254
Advance Information
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
