PIC18FXX20
The WDT time-out period values may be found in the
Electrical Specifications section under parameter #31.
Values for the WDT postscaler may be assigned using
the configuration bits.
23.2 Watchdog Timer (WDT)
The Watchdog Timer is a free running, on-chip RC
oscillator, which does not require any external compo-
nents. This RC oscillator is separate from the RC oscil-
lator of the OSC1/CLKI pin. That means that the WDT
will run, even if the clock on the OSC1/CLKI and
OSC2/CLKO/RA6 pins of the device has been stopped,
for example, by execution of a SLEEPinstruction.
During normal operation, a WDT time-out generates a
device RESET (Watchdog Timer Reset). If the device is
in SLEEP mode, a WDT time-out causes the device to
wake-up and continue with normal operation (Watch-
dog Timer Wake-up). The TO bit in the RCON register
will be cleared upon a WDT time-out.
Note 1: The CLRWDT and SLEEP instructions
clear the WDT and the postscaler, if
assigned to the WDT and prevent it from
timing out and generating
RESET condition.
a device
2: When a CLRWDT instruction is executed
and the postscaler is assigned to the
WDT, the postscaler count will be cleared,
but the postscaler assignment is not
changed.
The Watchdog Timer is enabled/disabled by a device
configuration bit. If the WDT is enabled, software exe-
cution may not disable this function. When the WDTEN
configuration bit is cleared, the SWDTEN bit
enables/disables the operation of the WDT.
23.2.1
CONTROL REGISTER
Register 23-15 shows the WDTCON register. This is a
readable and writable register, which contains a control
bit that allows software to override the WDT enable
configuration bit, only when the configuration bit has
disabled the WDT.
REGISTER 23-15: WDTCON REGISTER
U-0
—
bit 7
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/W-0
SWDTEN
bit 0
bit 7-1
bit 0
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1= Watchdog Timer is on
0= Watchdog Timer is turned off if the WDTEN configuration bit in the Configuration
register = 0
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39609A-page 250
Advance Information
2003 Microchip Technology Inc.