PIC18CXX2
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
6.0
8 X 8 HARDWARE MULTIPLIER
6.1
Introduction
• Higher computational throughput
• Reduces code size requirements for multiply algo-
rithms
An 8 x 8 hardware multiplier is included in the ALU of
the PIC18CXX2 devices. By making the multiply a
hardware operation, it completes in a single instruction
cycle. This is an unsigned multiply that gives a 16-bit
result. The result is stored into the 16-bit product regis-
ter pair (PRODH:PRODL). The multiplier does not
affect any flags in the ALUSTA register.
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 6-1 shows a performance comparison between
enhanced devices using the single cycle hardware mul-
tiply, and performing the same function without the
hardware multiply.
TABLE 6-1:
Routine
PERFORMANCE COMPARISON
Multiply Method
Program
Cycles
(Max)
Time
Memory
(Words)
@ 40 MHz @ 10 MHz @ 4 MHz
8 x 8 unsigned
8 x 8 signed
Without hardware multiply
Hardware multiply
13
1
69
1
6.9 µs
100 ns
9.1 µs
600 ns
24.2 µs
2.4 µs
25.4 µs
3.6 µs
27.6 µs
400 ns
36.4 µs
2.4 µs
69 µs
1 µs
Without hardware multiply
Hardware multiply
33
6
91
6
91 µs
6 µs
16 x 16 unsigned
16 x 16 signed
Without hardware multiply
Hardware multiply
21
24
52
36
242
24
254
36
96.8 µs
9.6 µs
242 µs
24 µs
254 µs
36 µs
Without hardware multiply
Hardware multiply
102.6 µs
14.4 µs
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 61
MICROCHIP [ MICROCHIP ]
