PIC18CXX2
21.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 21-5: EXTERNAL CLOCK TIMING
Q4
Q1
Q2
Q3
Q4
4
Q1
OSC1
1
3
4
3
2
CLKOUT
TABLE 21-4: EXTERNAL CLOCK TIMING REQUIREMENTS
Param. No. Symbol Characteristic
Min
Max
Units Conditions
1A
Fosc
Tosc
TCY
External CLKIN
Frequency(1)
DC
DC
4
DC
DC
DC
0.1
4
4
5
250
40
100
5
40
40
10
40
40
4
MHz XT 0osc
MHz HS osc
MHz HS + PLL osc
kHz LP osc
MHz EC
MHz RC osc
MHz XT osc
MHz HS osc
MHz HS + PLL osc
kHz LP osc mode
Oscillator Frequency(1)
External CLKIN Period(1)
Oscillator Period(1)
4
25
10
200
—
—
—
—
—
—
10,000
10,000
100
—
—
1
ns
ns
ns
µs
ns
ns
ns
ns
ns
µs
ns
XT and RC osc
HS osc
HS + PLL osc
LP osc
EC
RC osc
XT osc
HS osc
HS + PLL osc
LP osc
TCY = 4/FOSC
5
250
250
100
40
5
Instruction Cycle Time(1)
External Clock in (OSC1)
High or Low Time
2
3
100
TosL,
TosH
30
2.5
10
—
—
—
—
—
—
20
50
7.5
ns
µs
ns
ns
ns
ns
XT osc
LP osc
HS osc
XT osc
LP osc
HS osc
4
TosR,
TosF
External Clock in (OSC1)
Rise or Fall Time
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are
based on characterization data for that particular oscillator type under standard operating conditions with the
device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or
higher than expected current consumption. All devices are tested to operate at "min." values with an external
clock applied to the OSC1/CLKIN pin. When an external clock input is used, the "Max." cycle time limit is
"DC" (no clock) for all devices.
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 253
MICROCHIP [ MICROCHIP ]
