PIC18CXX2
FIGURE 14-25: BUS COLLISION DURING START CONDITION (SCL = 0)
SDA = 0, SCL = 1
TBRG
TBRG
SDA
SCL
SEN
Set SEN, enable start
sequence if SDA = 1, SCL = 1
SCL = 0 before SDA = 0,
Bus collision occurs, Set BCLIF.
SCL = 0 before BRG time out,
Bus collision occurs, Set BCLIF.
BCLIF
Interrupt cleared
in software.
S
’0’
’0’
’0’
’0’
SSPIF
FIGURE 14-26: BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA = 0, SCL = 1
Set S
Set SSPIF
Less than TBRG
TBRG
SDA pulled low by other master.
Reset BRG and assert SDA
SDA
SCL
S
SCL pulled low after BRG
Timeout
SEN
Set SEN, enable start
sequence if SDA = 1, SCL = 1
BCLIF
’0’
S
SSPIF
Interrupts cleared
in software.
SDA = 0, SCL = 1
Set SSPIF
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 147
MICROCHIP [ MICROCHIP ]
