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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
The instruction set and architecture allow operations  
across all banks. The entire data memory may be  
accessed by Direct, Indirect or Indexed Addressing  
modes. Addressing modes are discussed later in this  
subsection.  
6.5  
Data Memory Organization  
The data memory in PIC18 devices is implemented as  
static RAM. Each register in the data memory has a 12-bit  
address, allowing up to 4,096 bytes of data memory. The  
memory space is divided into as many as 16 banks that  
contain 256 bytes each. PIC18F2331/2431/4331/4431  
devices implement all 16 banks.  
To ensure that commonly used registers (SFRs and  
select GPRs) can be accessed in a single cycle, PIC18  
devices implement an Access Bank. This is a 256-byte  
memory space that provides fast access to SFRs and  
the lower portion of GPR Bank 0 without using the  
Figure 6-6 shows the data memory organization for the  
PIC18F2331/2431/4331/4431 devices. The data mem-  
ory contains Special Function Registers (SFRs) and  
General Purpose Registers (GPRs). The SFRs are used  
for control and status of the controller and peripheral  
functions, while GPRs are used for data storage and  
scratchpad operations in the user’s application. Any  
read of an unimplemented location will read as ‘0’s.  
BSR. Section 6.5.2 “Access Bank” provides  
a
detailed description of the Access RAM.  
FIGURE 6-6:  
DATA MEMORY MAP FOR PIC18F2331/2431/4331/4431 DEVICES  
Data Memory Map  
BSR<3:0>  
000h  
05Fh  
060h  
0FFh  
100h  
00h  
Access RAM  
GPR  
= 0000  
Bank 0  
Bank 1  
Bank 2  
FFh  
00h  
= 0001  
= 0010  
GPR  
GPR  
1FFh  
200h  
FFh  
00h  
FFh  
00h  
2FFh  
300h  
Access Bank  
00h  
Access RAM Low  
5Fh  
60h  
= 0011  
= 1110  
Access RAM High  
Bank 3  
to  
Bank 14  
Unused  
Read ‘00h’  
(SFRs)  
FFh  
When a = 0:  
The BSR is ignored and the  
Access Bank is used.  
The first 96 bytes are  
General Purpose RAM  
(from Bank 0).  
The second 160 bytes are  
Special Function Registers  
(from Bank 15).  
EFFh  
F00h  
F5Fh  
F60h  
FFFh  
00h  
FFh  
Unused  
SFR  
= 1111  
Bank 15  
When a = 1:  
The BSR specifies the bank  
used by the instruction.  
2010 Microchip Technology Inc.  
DS39616D-page 67  
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