PIC18F2331/2431/4331/4431
REGISTER 21-3: ADCON2: A/D CONTROL REGISTER 2
R/W-0
ADFM
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
ACQT3
ACQT2
ACQT1
ACQT0
ADCS2
ADCS1
ADCS0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 7
ADFM: A/D Result Format Select bit
1= Right justified
0= Left justified
bit 6-3
ACQT<3:0>: A/D Acquisition Time Select bits
0000= No delay (conversion starts immediately when GO/DONE is set)(1)
0001= 2 TAD
0010= 4 TAD
0011= 6 TAD
0100= 8 TAD
0101= 10 TAD
0110= 12 TAD
0111= 16 TAD
1000= 20 TAD
1001= 24 TAD
1010= 28 TAD
1011= 32 TAD
1100= 36 TAD
1101= 40 TAD
1110= 48 TAD
1111= 64 TAD
bit 2-0
ADCS<2:0>: A/D Conversion Clock Select bits
000= FOSC/2
001= FOSC/8
010= FOSC/32
011= FRC/4
100= FOSC/4
101= FOSC/16
110= FOSC/64
111= FRC (Internal A/D RC Oscillator)
Note 1: If the A/D RC clock source is selected, a delay of one TCY (instruction cycle) is added before the A/D clock
starts. This allows the SLEEPinstruction to be executed before starting a conversion.
DS39616D-page 242
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
