PIC18F2331/2431/4331/4431
REGISTER 21-2: ADCON1: A/D CONTROL REGISTER 1
R/W-0
R/W-0
U-0
—
R/W-0
R-0
R-0
R-0
R-0
VCFG1
VCFG0
FIFOEN
BFEMT
BFOVL
ADPNT1
ADPNT0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 7-6
VCFG<1:0>: A/D VREF+ and A/D VREF- Source Selection bits
00= VREF+ = AVDD, VREF- = AVSS (AN2 and AN3 are analog inputs or digital I/O)
01= VREF+ = External VREF+, VREF- = AVSS (AN2 is an analog input or digital I/O)
10= VREF+ = AVDD, VREF- = External VREF- (AN3 is an analog input or digital I/O)
11= VREF+ = External VREF-, VREF- = External VREF-
bit 5
bit 4
Unimplemented: Read as ‘0’
FIFOEN: FIFO Buffer Enable bit
1= FIFO is enabled
0= FIFO is disabled
bit 3
BFEMT: Buffer Empty bit
1= FIFO is empty
0= FIFO is not empty (at least one of four locations has unread A/D result data)
bit 2
BFOVFL: Buffer Overflow bit
1= A/D result has overwritten a buffer location that has unread data
0= A/D result has not overflowed
bit 1-0
ADPNT<1:0>: Buffer Read Pointer Location bits
Designates the location to be read next.
00= Buffer Address 0
01= Buffer Address 1
10= Buffer Address 2
11= Buffer Address 3
2010 Microchip Technology Inc.
DS39616D-page 241