PIC18FXX20
TABLE 19-2: SUMMARY OF A/D REGISTERS
Value on
Value on
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RBIF
all other
RESETS
POR, BOR
INTCON
GIE/
GIEH
PEIE/
GIEL
TMR0IE INT0IE
RBIE
TMR0IF
INT0IF
0000 0000
0000 0000
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
PORTA
TRISA
PORTF
LATF
TRISF
PORTH
LATH
TRISH
PSPIF
PSPIE
PSPIP
—
—
—
ADIF
ADIE
ADIP
CMIF
CMIE
CMIP
RCIF
RCIE
RCIP
—
—
—
TXIF
TXIE
TXIP
—
—
—
SSPIF CCP1IF
SSPIE CCP1IE
SSPIP CCP1IP
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TMR1IF 0000 0000
TMR1IE 0000 0000
TMR1IP 0111 1111
CCP2IF -0-- 0000
CCP2IE -0-- 0000
CCP2IP -0-- 0000
xxxx xxxx
0000 0000
0000 0000
0111 1111
-0-- 0000
-0-- 0000
-0-- 0000
uuuu uuuu
uuuu uuuu
--00 0000
--00 0000
0--- -000
--0u 0000
--11 1111
u000 0000
uuuu uuuu
1111 1111
0000 xxxx
uuuu uuuu
1111 1111
BCLIF
BCLIE
BCLIP
LVDIF
LVDIE
LVDIP
A/D Result Register High Byte
A/D Result Register Low Byte
—
—
ADFM
—
—
RF7
LATF7
xxxx xxxx
—
—
—
CHS3
CHS3
CHS1
CHS0
GO/DONE
PCFG1
ADCS1
RA1
ADON
PCFG0
ADCS0
RA0
--00 0000
--00 0000
0--- -000
--0x 0000
--11 1111
x000 0000
xxxx xxxx
1111 1111
0000 xxxx
xxxx xxxx
1111 1111
VCFG1 VCFG0 PCFG3 PCFG2
—
RA5
—
RA4
—
RA3
ADCS2
RA2
RA6
PORTA Data Direction Register
RF6
LATF6
RF5
LATF5
RF4
LATF4
RF3
RF2
RF1
LATF1
RF0
LATF0
LATF3
LATF2
PORTF Data Direction Control Register
RH7
LATH7
(1)
RH6
LATH6
RH5
LATH5
RH4
LATH4 LATH3
RH3
RH2
RH1
LATH1
RH0
LATH0
(1)
LATH2
(1)
PORTH Data Direction Control Register
Legend: x= unknown, u= unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Note 1: Only available on PIC18F8X20 devices.
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 221
MICROCHIP [ MICROCHIP ]
