PIC18F2220/2320/4220/4320
FIGURE 26-7:
CLKO AND I/O TIMING
Q1
Q2
Q3
Q4
OSC1
11
10
CLKO
13
12
19
18
14
16
I/O pin
(Input)
15
17
I/O pin
(Output)
New Value
Old Value
20, 21
Refer to Figure 26-5 for load conditions.
Note:
TABLE 26-9: CLKO AND I/O TIMING REQUIREMENTS
Param
Symbol
Characteristic
Min
Typ
Max
Units Conditions
No.
10
TOSH2CKL OSC1 ↑ to CLKO ↓
TOSH2CKH OSC1 ↑ to CLKO ↑
—
—
—
—
—
75
75
35
35
—
—
—
50
—
—
200
200
100
100
ns
ns
ns
ns
(1)
(1)
(1)
(1)
(1)
(1)
(1)
11
12
13
14
15
16
17
18
18A
TCKR
TCKF
CLKO Rise Time
CLKO Fall Time
TCKL2IOV CLKO ↓ to Port Out Valid
0.5 TCY + 20 ns
TIOV2CKH Port In Valid before CLKO ↑
TCKH2IOI Port In Hold after CLKO ↑
0.25 TCY + 25
—
—
ns
ns
ns
ns
ns
0
TOSH2IOV OSC1↑ (Q1 cycle) to Port Out Valid
TOSH2IOI OSC1↑ (Q2 cycle) to Port PIC18FXX20
—
150
—
100
200
Input Invalid
(I/O in hold time)
PIC18LFXX20
—
19
TIOV2OSH Port Input Valid to OSC1↑ (I/O in setup time)
0
—
10
—
10
—
—
25
60
25
60
ns
ns
ns
ns
ns
20
TIOR
Port Output Rise Time
Port Output Fall Time
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
—
—
—
—
20A
21
TIOF
21A
Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC.
2003 Microchip Technology Inc.
DS39599C-page 327
MICROCHIP [ MICROCHIP ]
