PIC18F2220/2320/4220/4320
20.7 Comparator Operation in Power
20.9 Analog Input Connection
Considerations
Managed Modes
When a comparator is active and the device is placed
in a power managed mode, the comparator remains
active and the interrupt is functional if enabled. This
interrupt will wake-up the device from a power
managed mode when enabled. Each operational com-
parator will consume additional current, as shown in
the comparator specifications. To minimize power
consumption while in a power managed mode, turn off
the comparators (CM<2:0> = 111) before entering the
power managed modes. If the device wakes up from a
power managed mode, the contents of the CMCON
register are not affected.
A simplified circuit for an analog input is shown in
Figure 20-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. Therefore, the analog input must be between
VSS and VDD. If the input voltage exceeds this range by
more than 0.6V, one of the diodes is forward biased
and a latch-up condition may occur. A maximum source
impedance of 10 kΩ is recommended for the analog
sources.
20.8 Effects of a Reset
A device Reset forces the CMCON register to its Reset
state, causing the comparator module to be in the Com-
parator Reset mode (CM<2:0> = 111). This ensures
that all potential inputs are analog inputs. Device cur-
rent is minimized when digital inputs are present at
Reset time. The comparators will be powered down
during the Reset interval.
FIGURE 20-4:
COMPARATOR ANALOG INPUT MODEL
VDD
VT = 0.6V
RIC
RS < 10k
AIN
Comparator
Input
ILEAKAGE
±500 nA
CPIN
5 pF
VA
VT = 0.6V
VSS
Legend: CPIN
=
Input Capacitance
VT
= Threshold Voltage
ILEAKAGE = Leakage Current at the pin due to various junctions
RIC
RS
VA
=
=
=
Interconnect Resistance
Source Impedance
Analog Voltage
2003 Microchip Technology Inc.
DS39599C-page 225
MICROCHIP [ MICROCHIP ]
