PIC18F2220/2320/4220/4320
TABLE 20-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Value on
all other
Resets
Value on
POR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CMCON C2OUT C1OUT C2INV C1INV
CVRCON CVREN CVROE CVRR
CIS
CM2
CM1
CM0
0000 0111 0000 0111
—
CVR3
CVR2
CVR1
CVR0 000- 0000 000- 0000
RBIF 0000 0000 0000 0000
INTCON
GIE/
PEIE/ TMR0IE INT0IE
GIEL
RBIE TMR0IF INT0IF
GIEH
PIR2
—
—
CMIF
CMIE
CMIP
RA6(1)
—
—
—
—
—
BCLIF
BCLIE
BCLIP
RA3
LVDIF TMR3IF CCP2IF -0-- 0000 -0-- 0000
LVDIE TMR3IE CCP2IE -0-- 0000 -0-- 0000
LVDIP TMR3IP CCP2IP -1-- 1111 -1-- 1111
PIE2
IPR2
—
RA7(1)
—
—
PORTA
LATA
TRISA
RA5
RA4
RA2
RA1
RA0
xx0x 0000 xx0x 0000
xxxx xxxx xxxx xxxx
1111 1111 1111 1111
—
LATA Data Output Register
PORTA Data Direction Register
—
—
Legend: x= unknown, u= unchanged, - = unimplemented, read as ‘0’.
Shaded cells are unused by the comparator module.
Note 1: These pins are enabled based on oscillator configuration (see Configuration Register 1H).
DS39599C-page 226
2003 Microchip Technology Inc.