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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
19.3 Selecting and Configuring  
Automatic Acquisition Time  
19.4 Selecting the A/D Conversion Clock  
The A/D conversion time per bit is defined as TAD. The  
A/D conversion requires 11 TAD per 10-bit conversion.  
The source of the A/D conversion clock is software  
selectable. There are seven possible options for TAD:  
The ADCON2 register allows the user to select an  
acquisition time that occurs each time the GO/DONE  
bit is set.  
• 2 TOSC  
When the GO/DONE bit is set, sampling is stopped and  
a conversion begins. The user is responsible for ensur-  
ing the required acquisition time has passed between  
selecting the desired input channel and setting the  
GO/DONE bit. This occurs when the ACQT2:ACQT0  
bits (ADCON2<5:3>) remain in their Reset state (‘000’)  
and is compatible with devices that do not offer  
programmable acquisition times.  
• 4 TOSC  
• 8 TOSC  
• 16 TOSC  
• 32 TOSC  
• 64 TOSC  
• Internal RC Oscillator  
For correct A/D conversions, the A/D conversion clock  
(TAD) must be as short as possible, but greater than the  
minimum TAD (approximately 2 µs, see parameter #130  
for more information).  
If desired, the ACQT bits can be set to select a  
programmable acquisition time for the A/D module.  
When the GO/DONE bit is set, the A/D module contin-  
ues to sample the input for the selected acquisition  
time, then automatically begins a conversion. Since the  
acquisition time is programmed, there may be no need  
to wait for an acquisition time between selecting a  
channel and setting the GO/DONE bit.  
Table 19-1 shows the resultant TAD times derived from  
the device operating frequencies and the A/D clock  
source selected.  
In either case, when the conversion is completed, the  
GO/DONE bit is cleared, the ADIF flag is set and the  
A/D begins sampling the currently selected channel  
again. If an acquisition time is programmed, there is  
nothing to indicate if the acquisition time has ended or  
if the conversion has begun.  
TABLE 19-1: TAD vs. DEVICE OPERATING FREQUENCIES  
AD Clock Source (TAD)  
Maximum Device Frequency  
Operation  
ADCS2:ADCS0  
PIC18FXX20  
PIC18LFXX20(4)  
2 TOSC  
4 TOSC  
8 TOSC  
16 TOSC  
32 TOSC  
64 TOSC  
RC(3)  
000  
100  
001  
101  
010  
110  
x11  
1.25 MHz  
2.50 MHz  
5.00 MHz  
10.0 MHz  
20.0 MHz  
40.0 MHz  
1.00 MHz(1)  
666 kHz  
1.33 MHz  
2.66 MHz  
5.33 MHz  
10.65 MHz  
21.33 MHz  
1.00 MHz(2)  
Note 1: The RC source has a typical TAD time of 4 µs.  
2: The RC source has a typical TAD time of 6 µs.  
3: For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion or the A/D  
accuracy may be out of specification.  
4: Low-power devices only.  
2003 Microchip Technology Inc.  
DS39599C-page 217