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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
TABLE 1-2:  
PIC18F2220/2320 PINOUT I/O DESCRIPTIONS  
Pin Number  
PDIP SOIC  
Pin Buffer  
Type Type  
Pin Name  
Description  
MCLR/VPP/RE3  
MCLR  
1
1
Master Clear (input) or programming voltage (input).  
Master Clear (Reset) input. This pin is an active-low Reset  
to the device.  
I
ST  
ST  
VPP  
RE3  
P
I
Programming voltage input.  
Digital input.  
OSC1/CLKI/RA7  
OSC1  
9
9
Oscillator crystal or external clock input.  
I
I
ST  
CMOS  
TTL  
Oscillator crystal input or external clock source input.  
ST buffer when configured in RC mode, CMOS otherwise.  
External clock source input. Always associated with pin  
function OSC1. (See related OSC1/CLKI, OSC2/CLKO pins.)  
General purpose I/O pin.  
CLKI  
RA7  
I/O  
OSC2/CLKO/RA6  
OSC2  
10  
10  
Oscillator crystal or clock output.  
O
O
Oscillator crystal output. Connects to crystal or resonator  
in Crystal Oscillator mode.  
In RC mode, OSC2 pin outputs CLKO which has 1/4 the  
frequency of OSC1 and denotes the instruction cycle rate.  
General purpose I/O pin.  
CLKO  
RA6  
I/O  
TTL  
PORTA is a bidirectional I/O port.  
RA0/AN0  
RA0  
2
3
4
2
3
4
I/O  
I
TTL  
Analog  
Digital I/O.  
Analog input 0.  
AN0  
RA1/AN1  
RA1  
I/O  
I
TTL  
Analog  
Digital I/O.  
Analog input 1.  
AN1  
RA2/AN2/VREF-/CVREF  
RA2  
I/O  
TTL  
Digital I/O.  
AN2  
VREF-  
CVREF  
I
I
O
Analog  
Analog  
Analog  
Analog input 2.  
A/D Reference Voltage (Low) input.  
Comparator Reference Voltage output.  
RA3/AN3/VREF+  
RA3  
5
6
7
5
6
7
I/O  
I
I
TTL  
Analog  
Analog  
Digital I/O.  
Analog input 3.  
A/D Reference Voltage (High) input.  
AN3  
VREF+  
RA4/T0CKI/C1OUT  
RA4  
I/O ST/OD  
I
O
Digital I/O. Open-drain when configured as output.  
Timer0 external clock input.  
Comparator 1 output.  
T0CKI  
C1OUT  
ST  
RA5/AN4/SS/LVDIN/C2OUT  
RA5  
AN4  
SS  
LVDIN  
C2OUT  
I/O  
I
I
I
O
TTL  
Analog  
TTL  
Analog  
Digital I/O.  
Analog input 4.  
SPI Slave Select input.  
Low-Voltage Detect input.  
Comparator 2 output.  
RA6  
RA7  
See the OSC2/CLKO/RA6 pin.  
See the OSC1/CLKI/RA7 pin.  
Legend: TTL = TTL compatible input  
ST = Schmitt Trigger input with CMOS levels  
= Output  
OD = Open-drain (no diode to VDD)  
CMOS = CMOS compatible input or output  
I
= Input  
O
P
= Power  
Note 1: Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.  
2: Alternate assignment for CCP2 when CCP2MX is cleared.  
2003 Microchip Technology Inc.  
DS39599C-page 11