欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F2320-I/SP的Datasheet PDF文件第163页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第164页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第165页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第166页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第168页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第169页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第170页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第171页  
PIC18F2220/2320/4220/4320  
REGISTER 17-3: SSPSTAT: MSSP STATUS REGISTER (I2C MODE)  
R/W-0  
SMP  
R/W-0  
CKE  
R-0  
D/A  
R-0  
P
R-0  
S
R-0  
R-0  
UA  
R-0  
BF  
R/W  
bit 7  
bit 0  
bit 7  
bit 6  
bit 5  
SMP: Slew Rate Control bit  
In Master or Slave mode:  
1 = Slew rate control disabled  
0 = Slew rate control enabled  
CKE: SMBus Select bit  
In Master or Slave mode:  
1= Enable SMBus specific inputs  
0= Disable SMBus specific inputs  
D/A: Data/Address bit  
In Master mode:  
Reserved.  
In Slave mode:  
1= Indicates that the last byte received or transmitted was data  
0= Indicates that the last byte received or transmitted was address  
bit 4  
bit 3  
bit 2  
P: Stop bit  
1= Indicates that a Stop bit has been detected last  
0= Stop bit was not detected last  
Note:  
This bit is cleared on Reset when SSPEN is cleared or a Start bit has been detected.  
S: Start bit  
1= Indicates that a Start bit has been detected last  
0= Start bit was not detected last  
Note:  
This bit is cleared on Reset when SSPEN is cleared or a Stop bit has been detected.  
R/W: Read/Write bit Information (I2C mode only)  
In Slave mode:  
1= Read  
0= Write  
Note:  
This bit holds the R/W bit information following the last address match. This bit is  
only valid from the address match to the next Start bit, Stop bit or not ACK bit.  
In Master mode:  
1= Transmit is in progress  
0= Transmit is not in progress  
Note:  
OR’ing this bit with the SSPCON2 bits, SEN, RSEN, PEN, RCEN or ACKEN will  
indicate if the MSSP is in Idle mode.  
bit 1  
bit 0  
UA: Update Address (10-bit Slave mode only)  
1= Indicates that the user needs to update the address in the SSPADD register  
0= Address does not need to be updated  
BF: Buffer Full Status bit  
In Transmit mode:  
1= Data transmit in progress (does not include the ACK and Stop bits), SSPBUF is full  
0= Data transmit complete (does not include the ACK and Stop bits), SSPBUF is empty  
In Receive mode:  
1= Receive complete, SSPBUF is full  
0= Receive not complete, SSPBUF is empty  
Legend:  
R = Readable bit  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
- n = Value at POR  
2003 Microchip Technology Inc.  
DS39599C-page 165  
 复制成功!