PIC18F2220/2320/4220/4320
Besides its availability as a clock source, the internal
oscillator block provides a stable reference source that
gives the family additional features for robust
operation:
1.0
DEVICE OVERVIEW
This document contains device specific information for
the following devices:
• PIC18F2220
• PIC18F2320
• PIC18F4220
• PIC18F4320
• Fail-Safe Clock Monitor: This option constantly
monitors the main clock source against a reference
signal provided by the internal oscillator. If a clock
failure occurs, the controller is switched to the
internal oscillator block, allowing for continued
low-speed operation or a safe application shutdown.
This family offers the advantages of all PIC18 micro-
controllers – namely, high computational performance
at an economical price with the addition of high-
endurance Enhanced Flash program memory. On top
of these features, the PIC18F2220/2320/4220/4320
family introduces design enhancements that make
these microcontrollers a logical choice for many
high-performance, power sensitive applications.
• Two-Speed Start-up: This option allows the internal
oscillator to serve as the clock source from Power-on
Reset, or wake-up from Sleep mode, until the primary
clock source is available. This allows for code execu-
tion during what would otherwise be the clock start-up
interval and can even allow an application to perform
routine background activities and return to Sleep
without returning to full power operation.
1.1
New Core Features
1.1.1
nanoWatt TECHNOLOGY
All of the devices in the PIC18F2220/2320/4220/4320
family incorporate a range of features that can signifi-
cantly reduce power consumption during operation.
Key items include:
1.2
Other Special Features
• Memory Endurance: The Enhanced Flash cells for
both program memory and data EEPROM are rated
to last for many thousands of erase/write cycles – up
to 100,000 for program memory and 1,000,000 for
EEPROM. Data retention without refresh is
conservatively estimated to be greater than 40 years.
• Alternate Run Modes: By clocking the controller
from the Timer1 source or the internal oscillator
block, power consumption during code execution
can be reduced by as much as 90%.
• Multiple Idle Modes: The controller can also run
with its CPU core disabled, but the peripherals are
still active. In these states, power consumption can
be reduced even further, to as little as 4% of normal
operation requirements.
• Self-programmability: These devices can write to
their own program memory spaces under internal
software control. By using a bootloader routine
located in the protected Boot Block at the top of pro-
gram memory, it becomes possible to create an
application that can update itself in the field.
• On-the-fly Mode Switching: The power managed
modes are invoked by user code during operation,
allowing the user to incorporate power saving ideas
into their application’s software design.
• Enhanced CCP Module: In PWM mode, this
module provides 1, 2 or 4 modulated outputs for
controlling half-bridge and full-bridge drivers. Other
features include Auto-Shutdown for disabling PWM
outputs on interrupt or other select conditions and
Auto-Restart to reactivate outputs once the
condition has cleared.
• Lower Consumption in Key Modules: The power
requirements for both Timer1 and the Watchdog
Timer have been reduced by up to 80%, with typical
values of 1.8 and 2.2 µA, respectively.
• Addressable USART: This serial communication
module is capable of standard RS-232 operation
using the internal oscillator block, removing the
need for an external crystal (and its accompanying
power requirement) in applications that talk to the
outside world.
1.1.2
MULTIPLE OSCILLATOR OPTIONS
AND FEATURES
All of the devices in the PIC18F2220/2320/4220/4320
family offer nine different oscillator options, allowing
users a wide range of choices in developing application
hardware. These include:
• 10-bit A/D Converter: This module incorporates
programmable acquisition time, allowing for a chan-
nel to be selected and a conversion to be initiated
without waiting for a sampling period and thus,
reduce code overhead.
• Four Crystal modes using crystals or ceramic
resonators.
• Two External Clock modes offering the option of
using two pins (oscillator input and a divide-by-4
clock output) or one pin (oscillator input with the
second pin reassigned as general I/O).
• Extended Watchdog Timer (WDT): This enhanced
version incorporates a 16-bit prescaler, allowing a
time-out range from 4 ms to over 2 minutes, that is
stable across operating voltage and temperature.
• Two External RC Oscillator modes with the same
pin options as the External Clock modes.
• An internal oscillator block, which provides a 31 kHz
INTRC clock and an 8 MHz clock with 6 program
selectable divider ratios (4 MHz to 125 kHz) for a
total of 8 clock frequencies.
2003 Microchip Technology Inc.
DS39599C-page 7