PIC18F2220/2320/4220/4320
FIGURE 10-2:
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
FIGURE 10-4:
BLOCK DIAGRAM OF
RA4/T0CKI PIN
RD LATA
RD LATA
Data
Bus
Data
Bus
D
Q
D
Q
WR LATA
or
PORTA
VDD
WR LATA
or
PORTA
Q
I/O pin(1)
Q
Data Latch
CK
CK
P
N
Data Latch
I/O pin(1)
N
D
Q
Q
VSS
D
Q
WR TRISA
RD TRISA
Schmitt
Trigger
Input
WR TRISA
CK
VSS
Q
CK
Analog
Input
Mode
TRIS Latch
TRIS Latch
Buffer
RD TRISA
TTL
Input
Buffer
Q
D
Q
D
EN
EN
EN
RD PORTA
RD PORTA
SS Input (RA5 only)
TMR0 Clock Input
Note 1: I/O pins have protection diodes to VDD and VSS.
To A/D Converter and LVD Modules
Note 1: I/O pins have protection diodes to VDD and VSS.
FIGURE 10-5:
BLOCK DIAGRAM OF
RA7 PIN
FIGURE 10-3:
BLOCK DIAGRAM OF
RA6 PIN
RA6 Enable
RA7 Enable
To Oscillator
Data
Bus
Data
Bus
RD LATA
RD LATA
D
D
Q
Q
Q
Q
VDD
P
VDD
P
WR LATA
WR LATA
or
or
PORTA
PORTA
CK
CK
Data Latch
Data Latch
I/O pin(1)
I/O pin(1)
N
N
D
Q
D
Q
WR
WR
TRISA
TRISA
VSS
VSS
CK
CK
Q
Q
TRIS Latch
TRIS Latch
RD
RD
TRISA
TTL
Input
Buffer
TTL
Input
Buffer
TRISA
ECIO or
RCIO
RA7
Enable
Enable
Q
D
Q
D
EN
EN
RD PORTA
RD PORTA
Note 1: I/O pins have protection diodes to VDD and VSS.
2003 Microchip Technology Inc.
Note 1: I/O pins have protection diodes to VDD and VSS.
DS39599C-page 102
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