PIC17C4X
TABLE 13-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Value on
Power-on
Reset
Value on all
other resets
(Note1)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
16h, Bank 1
13h, Bank 0
16h, Bank 0
17h, Bank 1
15h, Bank 0
17h, Bank 0
PIR
RBIF
SPEN
TX7
TMR3IF TMR2IF TMR1IF CA2IF
CA1IF
FERR
TX2
TXIF
OERR
TX1
RCIF
RX9D
TX0
0000 0010
0000 -00x
xxxx xxxx
0000 0000
0000 --1x
xxxx xxxx
0000 0010
0000 -00u
uuuu uuuu
0000 0000
0000 --1u
uuuu uuuu
RCSTA
TXREG
PIE
RX9
TX6
SREN
TX5
CREN
TX4
—
TX3
RBIE
CSRC
TMR3IE TMR2IE TMR1IE CA2IE
TX9 TXEN SYNC
CA1IE
—
TXIE
RCIE
TX9D
TXSTA
SPBRG
—
TRMT
Baud rate generator register
Legend: x= unknown, u= unchanged, -= unimplemented read as a '0', shaded cells are not used for synchronous
master transmission.
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
FIGURE 13-9: SYNCHRONOUS TRANSMISSION
Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4
Q3 Q4 Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4
bit1
bit2
bit0
DT
bit0
bit7
(RA4/RX/DT pin)
Word 1
Word 2
CK
(RA5/TX/CK pin)
Write to
TXREG
Write word 2
Write word 1
TXIF
Interrupt flag
TRMT
'1'
TXEN
Note: Sync master mode; BRG = 0. Continuous transmission of two 8-bit words.
FIGURE 13-10: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
DT
bit0
bit2
bit1
bit6
bit7
(RA4/RX/DT pin)
CK
(RA5/TX/CK pin)
Write to
TXREG
TXIF bit
TRMT bit
DS30412C-page 94
1996 Microchip Technology Inc.