PIC17C4X
FIGURE 6-5: PIC17C42 REGISTER FILE
MAP
FIGURE 6-6: PIC17CR42/42A/43/R43/44
REGISTER FILE MAP
Addr Unbanked
Addr Unbanked
INDF0
FSR0
INDF0
FSR0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
PCL
PCL
PCLATH
ALUSTA
T0STA
CPUSTA
INTSTA
INDF1
PCLATH
ALUSTA
T0STA
CPUSTA
INTSTA
INDF1
FSR1
FSR1
WREG
TMR0L
TMR0H
TBLPTRL
TBLPTRH
BSR
WREG
TMR0L
TMR0H
TBLPTRL
TBLPTRH
BSR
(1)
(1)
(1)
(1)
(1)
(1)
Bank 0 Bank 1
Bank 2
Bank 3
Bank 0
Bank 1
Bank 2
Bank 3
PORTA
DDRB
DDRC
TMR1
TMR2
PW1DCL
PW2DCL
PW1DCH
PW2DCH
CA2L
PORTA
DDRB
DDRC
TMR1
TMR2
PW1DCL
PW2DCL
PW1DCH
PW2DCH
CA2L
10h
11h
12h
13h
14h
15h
16h
17h
18h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
PORTC
DDRD
PORTD
DDRE
PORTE
PIR
PORTC
DDRD
PORTD
DDRE
PORTE
PIR
PORTB
RCSTA
RCREG
TXSTA
TXREG
SPBRG
TMR3L
TMR3H
PR1
PORTB
RCSTA
RCREG
TXSTA
TXREG
SPBRG
PRODL
PRODH
TMR3L
TMR3H
PR1
PR2
CA2H
PR2
CA2H
PR3L/CA1L
PR3H/CA1H
TCON1
TCON2
PR3L/CA1L
PR3H/CA1H
TCON1
TCON2
PIE
PIE
1Fh
20h
General
Purpose
RAM
1Fh
20h
General
Purpose
General
Purpose
(2)
RAM
(2)
FFh
RAM
Note 1: SFR file locations 10h - 17h are banked. All
other SFRs ignore the Bank Select Register
(BSR) bits.
FFh
Note 1: SFR file locations 10h - 17h are banked. All
other SFRs ignore the Bank Select Register
(BSR) bits.
2: General Purpose Registers (GPR) locations
20h - FFh and 120h - 1FFh are banked. All
other GPRs ignore the Bank Select Register
(BSR) bits.
1996 Microchip Technology Inc.
DS30412C-page 33