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PIC17LC42-16I/JW 参数 Datasheet PDF下载

PIC17LC42-16I/JW图片预览
型号: PIC17LC42-16I/JW
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能8位CMOS EPROM / ROM微控制器 [High-Performance 8-Bit CMOS EPROM/ROM Microcontroller]
分类和应用: 微控制器可编程只读存储器电动程控只读存储器
文件页数/大小: 240 页 / 1141 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC17C4X  
TABLE 6-3:  
SPECIAL FUNCTION REGISTERS (Cont.d)  
Value on  
Power-on  
Reset  
Value on all  
other  
resets (3)  
Address Name  
Bank 2  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
10h  
11h  
12h  
13h  
14h  
15h  
16h  
17h  
TMR1  
Timer1  
Timer2  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
TMR2  
TMR3L  
TMR3H  
PR1  
TMR3 register; low byte  
TMR3 register; high byte  
Timer1 period register  
Timer2 period register  
PR2  
PR3L/CA1L  
Timer3 period register, low byte/capture1 register; low byte  
PR3H/CA1H Timer3 period register, high byte/capture1 register; high byte  
Bank 3  
10h  
PW1DCL  
PW2DCL  
PW1DCH  
PW2DCH  
CA2L  
DC1  
DC1  
DC9  
DC9  
DC0  
DC0  
DC8  
DC8  
TM2PW2  
DC7  
xx-- ---- uu-- ----  
xx0- ---- uu0- ----  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
11h  
12h  
DC6  
DC6  
DC5  
DC5  
DC4  
DC4  
DC3  
DC3  
DC2  
DC2  
13h  
DC7  
14h  
Capture2 low byte  
Capture2 high byte  
15h  
CA2H  
16h  
TCON1  
CA2ED1 CA2ED0 CA1ED1  
CA1ED0  
T16  
TMR3CS TMR2CS TMR1CS 0000 0000 0000 0000  
17h  
TCON2  
CA2OVF CA1OVF PWM2ON PWM1ON CA1/PR3 TMR3ON TMR2ON TMR1ON 0000 0000 0000 0000  
Unbanked  
18h(5)  
19h(5)  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
PRODL  
PRODH  
Low Byte of 16-bit Product (8 x 8 Hardware Multiply)  
High Byte of 16-bit Product (8 x 8 Hardware Multiply)  
Legend:  
Note 1:  
x = unknown, u = unchanged, - = unimplemented read as '0', q - value depends on condition. Shaded cells are unimplemented, read as '0'.  
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<15:8> whose contents are updated  
from or transferred to the upper byte of the program counter.  
2:  
3:  
4:  
The TO and PD status bits in CPUSTA are not affected by a MCLR reset.  
Other (non power-up) resets include: external reset through MCLR and the Watchdog Timer Reset.  
The following values are for both TBLPTRL and TBLPTRH:  
All PIC17C4X devices (Power-on Reset 0000 0000) and (All other resets 0000 0000)  
except the PIC17C42 (Power-on Reset xxxx xxxx) and (All other resets uuuu uuuu)  
The PRODL and PRODH registers are not implemented on the PIC17C42.  
5:  
1996 Microchip Technology Inc.  
DS30412C-page 35  
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